Datasheet > M02044CG-31

M02044CG-31

更新时间： 2022-02-26 13:54:49

品牌	Logo	应用领域
泰科 - TE		/
页数	文件大小	规格书
22页	478K
描述
3.3/5V Limiting Amplifier for Applications from 100 Mbps to 622 Mbps

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M02044CG-31 数据手册

Functional Description

3.2

Features

•

Pin compatible with the MC2044C

Operates with a 3.3V or 5V supply

2.8 mV typical input sensitivity at 622 Mbps

Programmable input-signal level detect

On-chip DC offset cancellation circuit

CMOS Signal Detect and LOS outputs

Output Jam Function

Low power (< 200 mW including PECL outputs)

3.3

General Description

The M02044 is a high-gain limiting amplifier for applications up to 622 Mbps, and incorporates a limiting amplifier,

an input signal level detection circuit and also a fully integrated DC-offset cancellation loop that does not require

any external components. The M02044 features PECL high-speed data outputs.

The M02044 provides the user with the flexibility to set the signal detect threshold and features CMOS status and

LOS outputs. Optional output buffer disable (squelch/jam) can be implemented using the JAM input.

3.3.1

Inputs

The data inputs are internally connected to V via 50Ω resistors, and generally need to be AC coupled. Referring

to Figure 3-2, the nominal V voltage is 2.85V because of the internal resistor divider to V

, which means this is

CC3

the DC potential on the data inputs. See the applications information section for further details on choosing the AC-

coupling capacitor.

Figure 3-2. CML Data Inputs

CC3

1.3 kΩ

8.3 kΩ

50 Ω

DINN

DINP

02044-DSH-002-A

Mindspeed Technologies™

Mindspeed Proprietary and Confidential

1...7 8 91011 12 13...22

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