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LXT6051QE PDF预览

LXT6051QE

更新时间: 2024-01-17 05:42:25
品牌 Logo 应用领域
LevelOne ATM异步传输模式电信电信集成电路
页数 文件大小 规格书
144页 1722K
描述
Terminator, 1-Func, CMOS, PQFP208, PLASTIC, QFP-208

LXT6051QE 技术参数

生命周期:Transferred零件包装代码:QFP
包装说明:,针数:208
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.44Is Samacsys:N
应用程序:SDHJESD-30 代码:S-PQFP-G208
功能数量:1端子数量:208
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装形状:SQUARE
封装形式:FLATPACK认证状态:Not Qualified
标称供电电压:3.3 V表面贴装:YES
技术:CMOS电信集成电路类型:ATM/SONET/SDH TERMINATOR
温度等级:INDUSTRIAL端子形式:GULL WING
端子位置:QUADBase Number Matches:1

LXT6051QE 数据手册

 浏览型号LXT6051QE的Datasheet PDF文件第2页浏览型号LXT6051QE的Datasheet PDF文件第3页浏览型号LXT6051QE的Datasheet PDF文件第4页浏览型号LXT6051QE的Datasheet PDF文件第5页浏览型号LXT6051QE的Datasheet PDF文件第6页浏览型号LXT6051QE的Datasheet PDF文件第7页 
Datasheet  
JUNE 1999  
Revision2.0  
LXT6051  
STM-1/0 SDH Overhead Terminator  
General Description  
Features  
The LXT6051 Overhead Terminator implements the  
Regenerator Section Termination, Multiplexer Section  
Termination and Higher Order Path Termination in STM-0  
(51Mb/s) and STM-1 (155Mb/s) multiplexers. It provides  
micro-controller access for performance monitoring, alarm  
detection and configuration for transmit and receive paths.  
When used with the LXT6251 (21E1 Mapper), a complete  
solution for a 21 E1 or a 63 E1 Multiplexer is created.  
• Performs Regenerator Section, Multiplexer Section,  
and Higher Order Path Overhead Processing for  
STM-1 and STM-0 signals.  
• Byte parallel interface for STM-1 or STM-0, with  
byte alignment performed internally. Serial NRZ or  
B3ZS interface option for STM-0.  
• Demultiplexes STM-0/STM-1 signals to Telecom Bus  
output with optional pointer processor re-timing.  
• Multiplexes Telecom Bus data into STM-0 or STM-1  
signals with pointer processing.  
The LXT6051 is compliant with the latest releases of ITU-  
T G.703 and G.707. It provides all the alarm and control  
features to easily implement the multiplexer described in  
ITU-T G.783.  
• Compatible with 1+1 protected ITU architecture.  
• Records all RSOH, MSOH, and HPOH alarms. One  
second counters for B1, B2, B3, M1 REI and G1 REI.  
• Full J0/J1 trace identifier processing.  
Applications  
• Serial access to STM-1 user-defined, media-  
dependent and national bytes.  
• Dedicated pins for serial access or pass-through  
feature for E1, E2, F1, F2, F3, D1-D3 & D4-D12  
bytes.  
• SDH Terminal Mux/ADM for microwave radio  
• ADM fiber ring Mux  
• Digital Loop Carrier (NGDLC) Systems  
• Digital Cross-Connect System  
• Low power CMOS technology with 3.3V core and 5V  
I/O in PQFP-208 package.  
• IEEE 1149.1 Boundary Scan (JTAG) support.  
LXT6051  
Block Diagram  
SETS  
POH  
Serial Accesses  
MMSP  
Bus  
SOH  
Serial Accesses  
LXT6051  
OHT  
Transm it  
Master  
Clock In  
TX  
4
TBus Tim ing  
AU-3/4 &  
VC-3/4  
Transmit Processor  
STM -0 / STM -1  
Transmit Section  
Term ination &  
Protection Function  
(RST, M ST, M SP)  
Transmit  
Tx Clock out  
Telecom  
Bus Add  
Interface  
6.48M/19.44M Clock  
Data  
Telecom Bus Data  
(HPT, M SA (PP))  
1
8
or 8 (STM-0)  
(STM -1)  
LXT6251  
21 Channel  
M apper  
STM-0/1  
Line  
Interface  
Microcontroller Interface (Intel/Motorola selectable)  
1
8
or  
8 (STM-0)  
AU-3/4 &  
VC-3/4  
Receive Processor  
(STM -1)  
Data  
Clock  
LOS  
Receive  
Telecom  
Bus  
Drop  
Interface  
STM -0 / STM -1  
Receive Section  
Term ination &  
Telecom Bus Data  
6.48M/19.44M Clock  
Protection Function  
(RST, M ST, M SP)  
(M SA, HPT &  
Retiming)  
TBus Tim ing  
4
RX  
Optional retim ing  
Clock & tim ing  
POH  
Serial Accesses  
DMSP  
Bus  
SOH  
Serial Accesses  
LXT6051_DS_REV2.FM - 7/6/99  
Refer to www.level1.com for most current information.  

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