Datasheet > LXT6251QE

LXT6251QE

更新时间： 2024-02-17 18:12:11

品牌	Logo	应用领域
LevelOne		ATM 异步传输模式电信电信集成电路
页数	文件大小	规格书
72页	870K
描述
Support Circuit, 1-Func, CMOS, PQFP208, PLASTIC, QFP-208

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LXT6251QE 技术参数

生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	FQFP,	针数：	208
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.43	JESD-30 代码：	S-PQFP-G208
长度：	28 mm	功能数量：	1
端子数量：	208	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	FQFP	封装形状：	SQUARE
封装形式：	FLATPACK, FINE PITCH	认证状态：	Not Qualified
座面最大高度：	4.1 mm	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
电信集成电路类型：	ATM/SONET/SDH SUPPORT CIRCUIT	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	28 mm
Base Number Matches：	1

LXT6251QE 数据手册

DATA SHEET

JUNE 1999

Revision2.0

LXT6251

21 E1 SDH Mapper

LXT

General Description

Features

The LXT6251 21E1 Mapper performs asynchronous

mapping and demapping of 21 E1 PDH signals into SDH.

The PDH side interfaces with E1 LIUs and framers via

NRZ Clock & Data, while the SDH side uses a standard

Telecom bus interface. Further processing by the

companion LXT6051 Overhead Terminator chip creates

the final STM-0 or STM-1 signal. One mapper provides

complete processing of 21 E1s in STM-0, while three

mappers can process 63 E1s in STM-1.

• Maps and Demaps 21 E1 signals between PDH and

SDH networks via VC-12 asynchronous mapping.

• Multiplexes the 21 VC-12 signals into seven

interleaved TUG-2 structures for STM-0 or a TUG-3

structure for STM-1 applications.

• Configurable as a flexible Add/Drop Multiplexer for

up to 21 E1 tributaries, with each E1 I/O port

assignable to any TU time slot within an AU-3 or

TUG-3.

The LXT6251 is compliant with the latest releases of ITU-

T G.703 and G.707. It provides all the alarm and control

features to easily implement the multiplexer specified in

ITU-T G.783.

• Performs VC-12 path overhead processing for all 21

VC-12s, including V5, J2 Path Trace, and K4

Enhanced RDI.

• Records TU pointer alarms (TU-AIS, TU-LOP), BIP-

2 and REI error counts, TIM and PLM alarms, and all

other V5 POH alarms for all 21 tributaries.

Applications

• NRZ Data and Clock interface for E1 tributary access.

• Microprocessor/SEMF interface to set Signal Label,

J2 Path Trace, access alarms and counters

• 21 or 63 E1 Terminal or ADM SDH Multiplexer

• Digital Cross Connect System

• Low power CMOS technology with 3.3V core and 5V

I/O, available in PQFP-208 package.

• Digital Loop Carrier Systems (NGDLC)

• Microwave Radio Systems

• IEEE 1149.1 (JTAG) support.

LXT6251

Block Diagram

SETS

LXT6251

21 Channel

Mapper

Telecom Bus Tim ing

6.48M /19.44M Clock

VC-12

Path

Term ination

Fixed

Pointer

Generator

Telecom

Bus

Interface

E1 Clock

Telecom Bus Data

FIFO,

E1 Data

S/P

E1 Line

Interface

units

LXT6051

Overhead

Terminator

M icrocontroller Interface (Intel/M otorola selectable)

E1 Clock

E1 Data

Telecom Bus Data

6.48M /19.44M Clock

Telecom Bus Tim ing

FIFO, P/S,

Desynchronizer

VC-12

Path

Term ination

Telecom

Bus

Interface

Pointer

Interpreter

Refer to www.level1.com for most current information.

)

12 3 4 5 6 7...72

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