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LXT334QE PDF预览

LXT334QE

更新时间: 2024-11-25 19:49:15
品牌 Logo 应用领域
LevelOne PC电信电信集成电路
页数 文件大小 规格书
28页 527K
描述
PCM Transceiver, 4-Func, CEPT PCM-30/E-1, PQFP64,

LXT334QE 数据手册

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DATA SHEET  
JULY 1998  
Revision 1.0  
LXT334  
Quad Short-Haul Transceiver with Clock Recovery  
General Description  
Features  
The LXT334 is a quad, short-haul, PCM transceiver for  
2.048 MHz or 1.544 MHz transmission systems. Its low  
impedance transmit output drivers provide constant line  
impedance whether transmitting marks or spaces. The out-  
put pulse amplitudes are also constant, stabilized against  
supply voltage variations.  
• Fully integrated quad, short-haul PCM transceiver for  
G.703 2.048 Mbps or 1.544 Mbps operation  
• Single rail supply voltage of 5 V (typical)  
• Low power consumption of 410 mW (typical)  
• Programmable G.703 transmit pulse shaping for  
G.703 75 , 100 and 120 systems  
• High performance line drivers with constant low  
impedance for 20 dB return loss (typical)  
exceeds ETSI 300 166  
• On-chip band gap voltage reference for stabilized,  
constant output amplitude  
• High-performance receivers recover data with up to  
12 dB cable attenuation  
• Low frequency 1.544 or 2.048 MHz reference clock  
• On-chip clock recovery function  
• Programmable unipolar and bipolar PCM interface  
• On-chip AMI and HDB3 encoder/decoder  
• On-chip Driver Failure Monitoring circuit  
• Local and remote loopback testing function  
• Independent Loss of Signal processor for each  
channel conforms to ITU G.775 recommendation  
The LXT334 can be configured for balanced 100/120 or  
unbalanced 75 systems and exceeds the latest ETSI  
return loss recommendations. An on-chip pulse shaping  
circuit generates accurate transmit pulses independent of  
the transmit clock duty cycle. All transmitters and receivers  
incorporate a power down mode with output tri-stating.  
The LXT334 features differential receiver architecture  
with high noise interference margin. It uses peak detection  
with a variable threshold for reliable recovery of data as  
low as 500 mV (up to 12 dB of cable attenuation).  
The fully digital clock recovery system uses a low fre-  
quency master clock of 2.048 MHz or 1.544 MHz as its ref-  
erence. Each receiver incorporates a combination analog/  
digital Loss Of Signal (LOS) processor that meets the latest  
ITU G.775 standard. The LXT334 features a driver failure  
monitoring circuit in parallel to TTIP and TRING that  
reports driver shorts.  
• Small-footprint 64-pin QFP  
Applications  
• High density line cards using digital backend ASICs  
LXT334  
Block Diagram  
Refer to www.level1.com for most current information.  
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