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LV8573AN

更新时间: 2024-11-05 22:30:55
品牌 Logo 应用领域
美国国家半导体 - NSC 时钟
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18页 308K
描述
LV8573A Low Voltage Real Time Clock (RTC)

LV8573AN 数据手册

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PRELIMINARY  
December 1993  
LV8573A Low Voltage Real Time Clock (RTC)  
General Description  
l
main supply to the battery supply.  
The LV8573A is intended for use in microprocessor based  
systems where information is required for multi-tasking, data  
logging or general time of day/date information. This device  
is implemented in low voltage silicon gate microCMOS tech-  
nology to provide low standby power in battery back-up en-  
vironments. The circuit’s architecture is such that it looks  
like a contiguous block of memory or I/O ports organized as  
one block of 32 bytes. This includes the Control Registers,  
the Clock Counters, the Alarm Compare RAM, and the Time  
Save RAM.  
V , internal circuitry will automatically switch from the  
CC  
The LV8573A’s interrupt structure provides three basic  
types of interrupts: Periodic, Alarm/Compare, and Power  
Fail. Interrupt mask and status registers enable the masking  
and easy determination of each interrupt.  
Features  
Y
g
3.3V 10% supply  
Y
Y
Y
Full function real time clock/calendar  
Ð 12/24 hour mode timekeeping  
Ð Day of week counter  
Time and date are maintained from 1/100 of a second to  
year and leap year in a BCD format, 12 or 24 hour modes.  
Day of week and day of month counters are provided. Time  
is controlled by an on-chip crystal oscillator requiring only  
the addition of the 32.768 kHz crystal and two capacitors.  
Ð Parallel resonant oscillator  
Power fail features  
Ð Internal power supply switch to external battery  
Ð Power Supply Bus glitch protection  
Ð Automatic log of time into RAM at power failure  
On-chip interrupt structure  
Power failure logic and control functions have been integrat-  
ed on chip. This logic is used by the RTC to issue a power  
fail interrupt, and lock out the mP interface. The time power  
l
fails may be logged into RAM automatically when V  
BB  
. Additionally, two supply pins are provided. When V  
Ð Periodic, alarm, and power fail interrupts  
V
CC  
BB  
Block Diagram  
TL/F/11418–1  
FIGURE 1  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/11418  
RRD-B30M105/Printed in U. S. A.  

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