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LTVQ

更新时间： 2024-02-27 22:31:41

品牌	Logo	应用领域
凌特 - Linear		比较器
页数	文件大小	规格书
20页	244K
描述
4ns, 150MHz Dual Comparator with Independent Input/Output Supplies

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LTVQ 数据手册

LT1715

4ns, 150MHz

Dual Comparator with

Independent Input/Output Supplies

DESCRIPTION

FEATURES

TheLT^®1715isanUltraFast™dualcomparatoroptimizedfor

lowvoltageoperation.Separatesuppliesallowindependent

UltraFast: 4ns at 20mV Overdriven

150MHz Toggle Frequency

Separate Input and Output Power Supplies

Low Power: 4.6mA per Comparator at 3V

Pinout Optimized for High Speed Use

Output Optimized for 3V and 5V Supplies

TTL/CMOS Compatible Rail-to-Rail Output

Input Voltage Range Extends 100mV

Below Negative Rail

Internal Hysteresis with Speciﬁed Limits

Speciﬁed for –40°C to 125°C Temperature Range

Available in the 10-pin MSOP Package

analog input ranges and output logic levels with no loss of

performance.Theinputvoltagerangeextendsfrom100mV

belowV to1.2VbelowV .Internalhysteresismakesthe

LT1715 easy to use even with slow moving input signals.

The rail-to-rail outputs directly interface toTTL and CMOS.

The symmetric output drive results in similar rise and fall

times that can be harnessed for analog applications or for

easy translation to other single supply logic levels.

The LT1715 is available in the 10-pin MSOP package. The

pinoutoftheLT1715minimizesparasiticeffectsbyplacing

the most sensitive inputs away from the outputs, shielded

by the power rails.

APPLICATIONS

For a dual/quad single supply comparator with simi-

lar propagation delay, see the LT1720/LT1721. For a

single comparator with similar propagation delay, see

the LT1719.

High Speed Differential Line Receivers

Level Translators

Window Comparators

Crystal Oscillator Circuits

Threshold Detectors/Discriminators

High Speed Sampling Circuits

Delay Lines

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

UltraFast is a trademark of Linear Technology Corporation.

TYPICAL APPLICATION

100MHz Dual Differential Line Receiver

Line Receiver Response to 100MHz Clock,

50MHz Data Both with 25mV_P-PInputs

CLOCK OUT

–

1V/DIV

OUT A

OUT B

IN A

IN B

1V/DIV

–

DATA OUT

5ns/DIV

FET PROBES

1715 TA02

1715 TA01

–5V

1715fa

12 3 4 5 6 7...20

中文翻译

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