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LTC2325-14 PDF预览

LTC2325-14

更新时间： 2023-12-20 18:46:19
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
30页 1391K
描述
4 通道、14 位带符号位、每通道 5Msps、同时采样 ADC

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中文翻译

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LTC2325-14 数据手册

 浏览型号LTC2325-14的Datasheet PDF文件第2页浏览型号LTC2325-14的Datasheet PDF文件第3页浏览型号LTC2325-14的Datasheet PDF文件第4页浏览型号LTC2325-14的Datasheet PDF文件第5页浏览型号LTC2325-14的Datasheet PDF文件第6页浏览型号LTC2325-14的Datasheet PDF文件第7页 
LTC2325-14  
Quad, 14-Bit+Sign, 5Msps/Ch  
Simultaneous Sampling ADC  
FeaTures  
DescripTion  
The LTC®2325-14 is a low noise, high speed quad 14-bit  
+ sign successive approximation register (SAR) ADC with  
differential inputs and wide input common mode range.  
Operatingfromasingle3.3Vor5Vsupply,theLTC2325-14  
n
5Msps/Ch Throughput Rate  
n
Four Simultaneously Sampling Channels  
n
Guaranteed 14-Bit, No Missing Codes  
n
8V Differential Inputs with Wide Input  
P-P  
Common Mode Range  
has an 8V differential input range, making it ideal for  
P-P  
n
n
n
n
n
81dB SNR (Typ) at f = 2.2MHz  
applicationswhichrequireawidedynamicrangewithhigh  
commonmoderejection.TheLTC2325-14achieves 1LSB  
INL typical, no missing codes at 14 bits and 81dB SNR.  
IN  
IN  
–88dB THD (Typ) at f = 2.2MHz  
Guaranteed Operation to 125°C  
Single 3.3V or 5V Supply  
TheLTC2325-14hasanonboardlowdrift(20ppm/°Cmax)  
2.048V or 4.096V temperature-compensated reference.  
The LTC2325-14 also has a high speed SPI-compatible  
serial interface that supports CMOS or LVDS. The fast  
5Msps per channel throughput with one cycle latency  
makes the LTC2325-14 ideally suited for a wide variety  
of high speed applications. The LTC2325-14 dissipates  
only 45mW per channel and offers nap and sleep modes  
to reduce the power consumption to 26μW for further  
power savings during inactive periods.  
Low Drift (20ppm/°C Max) 2.048V or 4.096V  
Internal Reference  
n
n
n
n
1.8V to 2.5V I/O Voltages  
CMOS or LVDS SPI-Compatible Serial I/O  
Power Dissipation 45mW/Ch (Typ)  
Small 52-Lead (7mm × 8mm) QFN Package  
applicaTions  
n
High Speed Data Acquisition Systems  
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and  
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property  
of their respective owners.  
n
Communications  
n
Optical Networking  
Multiphase Motor Control  
n
Typical applicaTion  
32k Point FFT fSMPL = 5Msps,  
10µF  
1µF  
TRUE DIFFERENTIAL INPUTS  
NO CONFIGURATION REQUIRED  
fIN = 2.2MHz  
3.3V OR 5V  
1.8V TO 2.5V  
+
–
IN , IN  
0
SNR = 81.3dB  
V
GND  
GND  
O
V
DD  
DD  
ARBITRARY  
DIFFERENTIAL  
THD = –87.2dB  
SINAD = 80.5dB  
SFDR = 90.3dB  
14-BIT  
+SIGN  
SAR ADC  
+
V
V
–20  
–40  
DD  
DD  
0V  
A
IN1  
CMOS/LVDS  
SDR/DDR  
REFBUFEN  
S/H  
–
A
IN1  
14-BIT  
+SIGN  
SAR ADC  
+
–
A
A
IN2  
IN2  
0V  
S/H  
SDO1  
SDO2  
–60  
SDO3  
LTC2325-14  
SDO4  
–80  
14-BIT  
CLKOUT  
SCK  
+
–
A
A
BIPOLAR  
UNIPOLAR  
IN3  
IN3  
+SIGN  
S/H  
V
V
DD  
DD  
SAR ADC  
–100  
–120  
–140  
CNV  
SAMPLE  
CLOCK  
14-BIT  
+SIGN  
SAR ADC  
+
–
A
A
IN4  
IN4  
S/H  
0V  
0V  
REF REFOUT1 REFOUT2 REFOUT3 REFOUT4  
1µF 10µF 10µF 10µF 10µF  
0
0.5  
1
1.5  
2
2.5  
FOUR SIMULTANEOUS  
SAMPLING CHANNELS  
FREQUENCY (MHz)  
232514 TA01b  
232514 TA01a  
232514f  
1
For more information www.linear.com/LTC2325-14  
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