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LTC2325CUKG-12#PBF PDF预览

LTC2325CUKG-12#PBF

更新时间: 2024-02-01 02:42:24
品牌 Logo 应用领域
凌特 - Linear 转换器
页数 文件大小 规格书
30页 1341K
描述
LTC2325-12 - Quad, 12-Bit + Sign, 5Msps/Ch Simultaneous Sampling ADC; Package: QFN; Pins: 52; Temperature Range: 0°C to 70°C

LTC2325CUKG-12#PBF 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:QFN包装说明:HVQCCN,
针数:52Reach Compliance Code:compliant
风险等级:8.45Is Samacsys:N
最大模拟输入电压:2.064 V最小模拟输入电压:-2.034 V
最长转换时间:0.17 µs转换器类型:ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码:R-PQCC-N52JESD-609代码:e3
长度:8 mm最大线性误差 (EL):0.0244%
模拟输入通道数量:4位数:12
功能数量:1端子数量:52
最高工作温度:70 °C最低工作温度:
输出位码:2'S COMPLEMENT BINARY输出格式:SERIAL
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:RECTANGULAR封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260采样速率:5 MHz
采样并保持/跟踪并保持:SAMPLE座面最大高度:0.8 mm
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:7 mm
Base Number Matches:1

LTC2325CUKG-12#PBF 数据手册

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LTC2325-12  
Quad, 12-Bit+Sign, 5Msps/Ch  
Simultaneous Sampling ADC  
FeaTures  
DescripTion  
The LTC®2325-12 is a low noise, high speed quad 12-bit  
+ sign successive approximation register (SAR) ADC with  
differential inputs and wide input common mode range.  
Operatingfromasingle3.3Vor5Vsupply,theLTC2325-12  
n
5Msps/Ch Throughput Rate  
n
Four Simultaneously Sampling Channels  
n
Guaranteed 12-Bit, No Missing Codes  
n
8V Differential Inputs with Wide Input  
P-P  
Common Mode Range  
has an 8V differential input range, making it ideal for  
P-P  
n
n
n
n
n
77dB SNR (Typ) at f = 2.2MHz  
applications which require a wide dynamic range with  
high common mode rejection. The LTC2325-12 achieves  
±±.5LSꢀ INL typical, no missing codes at 12 bits and  
77dꢀ SNR.  
IN  
IN  
–86dB THD (Typ) at f = 2.2MHz  
Guaranteed Operation to 125°C  
Single 3.3V or 5V Supply  
Low Drift (2±ppm/°C Max) 2.±48V or 4.±96V  
Internal Reference  
TheLTC2325-12hasanonboardlowdrift(2±ppm/°Cmax)  
2.±48V or 4.±96V temperature-compensated reference.  
The LTC2325-12 also has a high speed SPI-compatible  
serial interface that supports CMOS or LVDS. The fast  
5Msps per channel throughput with one cycle latency  
makes the LTC2325-12 ideally suited for a wide variety  
of high speed applications. The LTC2325-12 dissipates  
only 45mW per channel and offers nap and sleep modes  
to reduce the power consumption to 26μW for further  
power savings during inactive periods.  
n
n
n
n
1.8V to 2.5V I/O Voltages  
CMOS or LVDS SPI-Compatible Serial I/O  
Power Dissipation 45mW/Ch (Typ)  
Small 52-Lead (7mm × 8mm) QFN Package  
applicaTions  
n
High Speed Data Acquisition Systems  
n
Communications  
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and  
ThinSOT is a trademark of Analog Devices, Inc. All other trademarks are the property of their  
respective owners.  
n
Optical Networking  
Multiphase Motor Control  
n
Typical applicaTion  
32k Point FFT fSMPL = 5Msps,  
10µF  
1µF  
TRUE DIFFERENTIAL INPUTS  
NO CONFIGURATION REQUIRED  
fIN = 2.2MHz  
3.3V OR 5V  
1.8V TO 2.5V  
+
0
IN , IN  
SNR = 77.1dB  
V
GND  
GND  
O
V
DD  
DD  
THD = –85.7dB  
SINAD = 76.2dB  
SFDR = 90.3dB  
ARBITRARY  
DIFFERENTIAL  
–20  
–40  
12-BIT  
+SIGN  
SAR ADC  
+
V
V
DD  
0V  
DD  
0V  
A
IN1  
CMOS/LVDS  
SDR/DDR  
REFBUFEN  
S/H  
A
IN1  
12-BIT  
+SIGN  
SAR ADC  
+
A
A
IN2  
IN2  
S/H  
SDO1  
SDO2  
SDO3  
SDO4  
CLKOUT  
SCK  
–60  
LTC2325-12  
–80  
12-BIT  
+
A
A
BIPOLAR  
UNIPOLAR  
IN3  
IN3  
+SIGN  
S/H  
V
V
DD  
DD  
–100  
–120  
–140  
SAR ADC  
CNV  
SAMPLE  
12-BIT  
+SIGN  
SAR ADC  
+
CLOCK  
A
A
IN4  
IN4  
S/H  
0V  
0V  
REF REFOUT1 REFOUT2 REFOUT3 REFOUT4  
1µF 10µF 10µF 10µF 10µF  
0
0.5  
1
1.5  
2
2.5  
FOUR SIMULTANEOUS  
SAMPLING CHANNELS  
FREQUENCY (MHz)  
232512 TA01b  
232512 TA01a  
232512f  
1
For more information www.linear.com/LTC2325-12  

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