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LTC2260IUJ-14#PBF PDF预览

LTC2260IUJ-14#PBF

更新时间: 2024-11-29 19:41:59
品牌 Logo 应用领域
凌特 - Linear 转换器
页数 文件大小 规格书
34页 782K
描述
LTC2260-14 - 14-Bit, 105Msps Ultra-Low Power 1.8V ADCs; Package: QFN; Pins: 40; Temperature Range: -40°C to 85°C

LTC2260IUJ-14#PBF 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:QFN包装说明:HVQCCN, LCC40,.24SQ,20
针数:40Reach Compliance Code:compliant
ECCN代码:3A991.C.3HTS代码:8542.39.00.01
风险等级:3.66转换器类型:ADC, PROPRIETARY METHOD
JESD-30 代码:S-PQCC-N40JESD-609代码:e3
长度:6 mm最大线性误差 (EL):0.0229%
湿度敏感等级:1模拟输入通道数量:1
位数:14功能数量:1
端子数量:40最高工作温度:85 °C
最低工作温度:-40 °C输出位码:OFFSET BINARY, 2'S COMPLEMENT BINARY
输出格式:PARALLEL, WORD封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC40,.24SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:1.8 V
认证状态:Not Qualified采样速率:105 MHz
采样并保持/跟踪并保持:SAMPLE座面最大高度:0.8 mm
子类别:Analog to Digital Converters标称供电电压:1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:6 mmBase Number Matches:1

LTC2260IUJ-14#PBF 数据手册

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LTC2261-14  
LTC2260-14/LTC2259-14  
14-Bit, 125/105/80Msps  
Ultralow Power 1.8V ADCs  
FeaTures  
DescripTion  
The LTC®2261-14/LTC2260-14/LTC2259-14 are sam-  
pling 14-bit A/D converters designed for digitizing high  
frequency, wide dynamic range signals. They are perfect  
for demanding communications applications with AC  
performancethatincludes73.4dBSNRand85dBspurious  
n
73.4dB SNR  
n
85dB SFDR  
n
Low Power: 127mW/106mW/89mW  
n
Single 1.8V Supply  
n
CMOS, DDR CMOS or DDR LVDS Outputs  
n
free dynamic range (SFDR). Ultralow jitter of 0.17ps  
Selectable Input Ranges: 1V to 2V  
RMS  
P-P  
P-P  
n
n
n
n
n
n
n
allows undersampling of IF frequencies with excellent  
800MHz Full-Power Bandwidth S/H  
noise performance.  
Optional Data Output Randomizer  
Optional Clock Duty Cycle Stabilizer  
Shutdown and Nap Modes  
DCspecsinclude 1LSBINL(typical), 0.3LSBDNL(typi-  
cal)andnomissingcodesovertemperature.Thetransition  
Serial SPI Port for Configuration  
noise is a low 1.2LSB  
.
RMS  
Pin Compatible 14-Bit and 12-Bit Versions  
The digital outputs can be either full-rate CMOS, double-  
data rate CMOS, or double-data rate LVDS. A separate  
output power supply allows the CMOS output swing to  
range from 1.2V to 1.8V.  
40-Pin (6mm × 6mm) QFN Package  
applicaTions  
n
+
Communications  
The ENC and ENC inputs may be driven differentially or  
single ended with a sine wave, PECL, LVDS, TTL or CMOS  
inputs. An optional clock duty cycle stabilizer allows high  
performance at full speed for a wide range of clock duty  
cycles.  
n
Cellular Base Stations  
n
Software Defined Radios  
Portable Medical Imaging  
Multi-Channel Data Acquisition  
Nondestructive Testing  
n
n
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear  
Technology Corporation. All other trademarks are the property of their respective owners.  
Typical applicaTion  
2-Tone FFT, fIN = 70MHz and 75MHz  
1.8V  
V
1.2V  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
TO 1.8V  
DD  
OV  
DD  
D13  
+
14-BIT  
PIPELINED  
ADC CORE  
CMOS  
OR  
LVDS  
CORRECTION  
LOGIC  
ANALOG  
INPUT  
OUTPUT  
DRIVERS  
INPUT  
S/H  
D0  
–80  
–90  
OGND  
–100  
–110  
–120  
CLOCK/DUTY  
CYCLE  
CONTROL  
0
20  
30  
40  
50  
60  
10  
226114 TA01a  
GND  
FREQUENCY (MHz)  
125MHz  
CLOCK  
226114 TA01b  
226114fc  
1
For more information www.linear.com/LTC2261-14  

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