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LTC2261IUJ-12#PBF PDF预览

LTC2261IUJ-12#PBF

更新时间: 2024-11-12 12:59:07
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
32页 818K
描述
LTC2261-12 - 12-Bit, 125Msps Ultralow Power 1.8V ADCs; Package: QFN; Pins: 40; Temperature Range: -40°C to 85°C

LTC2261IUJ-12#PBF 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:QFN包装说明:HVQCCN, LCC40,.24SQ,20
针数:40Reach Compliance Code:compliant
ECCN代码:3A991.C.2HTS代码:8542.39.00.01
风险等级:3.66Is Samacsys:N
转换器类型:ADC, PROPRIETARY METHODJESD-30 代码:S-PQCC-N40
JESD-609代码:e3长度:6 mm
最大线性误差 (EL):0.0244%湿度敏感等级:1
模拟输入通道数量:1位数:12
功能数量:1端子数量:40
最高工作温度:85 °C最低工作温度:-40 °C
输出位码:OFFSET BINARY, 2'S COMPLEMENT BINARY输出格式:PARALLEL, WORD
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装等效代码:LCC40,.24SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:1.8 V认证状态:Not Qualified
采样速率:125 MHz采样并保持/跟踪并保持:SAMPLE
座面最大高度:0.8 mm子类别:Analog to Digital Converters
标称供电电压:1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:6 mm
Base Number Matches:1

LTC2261IUJ-12#PBF 数据手册

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LTC2261-12  
LTC2260-12/LTC2259-12  
12-Bit, 125/105/80Msps  
Ultralow Power 1.8V ADCs  
FEATURES  
DESCRIPTION  
The LTC®2261-12/LTC2260-12/LTC2259-12 are sam-  
pling 12-bit A/D converters designed for digitizing high  
frequency, wide dynamic range signals. They are perfect  
for demanding communications applications with AC  
performancethatincludes70.8dBSNRand85dBspurious  
n
70.8dB SNR  
n
85dB SFDR  
n
Low Power: 124mW/103mW/87mW  
n
Single 1.8V Supply  
n
CMOS, DDR CMOS or DDR LVDS Outputs  
n
free dynamic range (SFDR). Ultralow jitter of 0.17ps  
Selectable Input Ranges: 1V to 2V  
RMS  
P-P  
P-P  
n
n
n
n
n
n
n
allows undersampling of IF frequencies with excellent  
800MHz Full-Power Bandwidth S/H  
noise performance.  
Optional Data Output Randomizer  
Optional Clock Duty Cycle Stabilizer  
Shutdown and Nap Modes  
DC specs include 0.3LSB INL (typical), 0.1LSB DNL  
(typical) and no missing codes over temperature. The  
transition noise is a low 0.3LSB  
Serial SPI Port for Configuration  
.
RMS  
Pin Compatible 14-Bit and 12-Bit Versions  
The digital outputs can be either full rate CMOS, double  
data rate CMOS, or double data rate LVDS. A separate  
output power supply allows the CMOS output swing to  
range from 1.2V to 1.8V.  
40-Pin (6mm × 6mm) QFN Package  
APPLICATIONS  
n
+
Communications  
The ENC and ENC inputs may be driven differentially  
or single-ended with a sine wave, PECL, LVDS, TTL or  
CMOS inputs. An optional clock duty cycle stabilizer al-  
lows high performance at full speed for a wide range of  
clock duty cycles.  
n
Cellular Base Stations  
n
Software Defined Radios  
Portable Medical Imaging  
Multi-Channel Data Acquisition  
Nondestructive Testing  
n
n
n
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.  
All other trademarks are the property of their respective owners.  
TYPICAL APPLICATION  
1.8V  
2-Tone FFT, fIN = 70MHz and 75MHz  
1.2V  
TO 1.8V  
V
DD  
0
OV  
DD  
–10  
–20  
–30  
–40  
–50  
–60  
–70  
D11  
+
12-BIT  
PIPELINED  
ADC CORE  
CMOS  
OR  
LVDS  
CORRECTION  
LOGIC  
ANALOG  
INPUT  
OUTPUT  
DRIVERS  
INPUT  
S/H  
D0  
OGND  
–80  
–90  
CLOCK/DUTY  
CYCLE  
CONTROL  
–100  
–110  
–120  
226112 TA01a  
GND  
0
20  
30  
40  
50  
60  
10  
125MHz  
CLOCK  
FREQUENCY (MHz)  
226112 TA01b  
226112f  
1

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