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LTC2259-14 PDF预览

LTC2259-14

更新时间: 2023-12-20 18:45:37
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
34页 789K
描述
14 位、80Msps、超低功率 1.8V ADC

LTC2259-14 数据手册

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LTC2261-14  
LTC2260-14/LTC2259-14  
14-Bit, 125/105/80Msps  
Ultralow Power 1.8V ADCs  
FeaTures  
DescripTion  
The LTC®2261-14/LTC2260-14/LTC2259-14 are sam-  
pling 14-bit A/D converters designed for digitizing high  
frequency, wide dynamic range signals. They are perfect  
for demanding communications applications with AC  
performancethatincludes73.4dBSNRand85dBspurious  
n
73.4dB SNR  
n
85dB SFDR  
n
Low Power: 127mW/106mW/89mW  
n
Single 1.8V Supply  
n
CMOS, DDR CMOS or DDR LVDS Outputs  
n
free dynamic range (SFDR). Ultralow jitter of 0.17ps  
Selectable Input Ranges: 1V to 2V  
RMS  
P-P  
P-P  
n
n
n
n
n
n
n
allows undersampling of IF frequencies with excellent  
800MHz Full-Power Bandwidth S/H  
noise performance.  
Optional Data Output Randomizer  
Optional Clock Duty Cycle Stabilizer  
Shutdown and Nap Modes  
DCspecsinclude 1LSBINL(typical), 0.3LSBDNL(typi-  
cal)andnomissingcodesovertemperature.Thetransition  
Serial SPI Port for Configuration  
noise is a low 1.2LSB  
.
RMS  
Pin Compatible 14-Bit and 12-Bit Versions  
The digital outputs can be either full-rate CMOS, double-  
data rate CMOS, or double-data rate LVDS. A separate  
output power supply allows the CMOS output swing to  
range from 1.2V to 1.8V.  
40-Pin (6mm × 6mm) QFN Package  
applicaTions  
n
+
Communications  
The ENC and ENC inputs may be driven differentially or  
single ended with a sine wave, PECL, LVDS, TTL or CMOS  
inputs. An optional clock duty cycle stabilizer allows high  
performance at full speed for a wide range of clock duty  
cycles.  
n
Cellular Base Stations  
n
Software Defined Radios  
Portable Medical Imaging  
Multi-Channel Data Acquisition  
Nondestructive Testing  
n
n
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear  
Technology Corporation. All other trademarks are the property of their respective owners.  
Typical applicaTion  
2-Tone FFT, fIN = 70MHz and 75MHz  
1.8V  
V
1.2V  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
TO 1.8V  
DD  
OV  
DD  
D13  
+
14-BIT  
PIPELINED  
ADC CORE  
CMOS  
OR  
LVDS  
CORRECTION  
LOGIC  
ANALOG  
INPUT  
OUTPUT  
DRIVERS  
INPUT  
S/H  
D0  
–80  
–90  
OGND  
–100  
–110  
–120  
CLOCK/DUTY  
CYCLE  
CONTROL  
0
20  
30  
40  
50  
60  
10  
226114 TA01a  
GND  
FREQUENCY (MHz)  
125MHz  
CLOCK  
226114 TA01b  
226114fc  
1
For more information www.linear.com/LTC2261-14  

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