Datasheet > LTC2175-12_15

LTC2175-12_15

更新时间： 2022-02-26 12:20:16

品牌	Logo	应用领域
凌特 - Linear		/
页数	文件大小	规格书
34页	1273K
描述
12-Bit, 125Msps/105Msps/ 80Msps Low Power Quad ADCs

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LTC2175-12_15 数据手册

LTC2175-12/

LTC2174-12/LTC2173-12

12-Bit, 125Msps/105Msps/

80Msps Low Power Quad ADCs

FeaTures

DescripTion

TheLTC^®2175-12/LTC2174-12/LTC2173-12are4-channel,

simultaneous sampling 12-bit A/D converters designed

for digitizing high frequency, wide dynamic range signals.

They are perfect for demanding communications applica-

tions with AC performance that includes 70.6dB SNR and

88dB spurious free dynamic range (SFDR). Ultralow jitter

4-Channel Simultaneous Sampling ADC

70.6dB SNR

88dB SFDR

Low Power: 545mW/439mW/369mW Total,

136mW/110mW/92mW per Channel

Single 1.8V Supply

of0.15ps

allowsundersamplingofIFfrequencieswith

Serial LVDS Outputs: 1 or 2 Bits per Channel

RMS

excellent noise performance.

Selectable Input Ranges: 1V

to 2V

P-P

800MHz Full Power Bandwidth S/H

DC specs include 0.3LSB INL (typ), 0.1LSB DNL (typ)

and no missing codes over temperature. The transition

Shutdown and Nap Modes

Serial SPI Port for Configuration

noise is a low 0.3LSB

RMS

Pin Compatible 14-Bit and 12-Bit Versions

The digital outputs are serial LVDS to minimize the num-

ber of data lines. Each channel outputs two bits at a time

(2-lane mode). At lower sampling rates there is a one bit

per channel option (1-lane mode). The LVDS drivers have

optional internal termination and adjustable output levels

to ensure clean signal integrity.

52-Pin (7mm × 8mm) QFN Package

applicaTions

Communications

Cellular Base Stations

Software Defined Radios

–

The ENC and ENC inputs may be driven differentially

or single-ended with a sine wave, PECL, LVDS, TTL, or

CMOS inputs. An internal clock duty cycle stabilizer al-

lows high performance at full speed for a wide range of

clock duty cycles.

Portable Medical Imaging

Multichannel Data Acquisition

Nondestructive Testing

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

Typical applicaTion

1.8V

LTC2175-12, 125Msps,

2-Tone FFT, f_IN= 70MHz and 75MHz

CHANNEL 1

ANALOG

INPUT

–10

–20

–30

–40

–50

12-BIT

OUT1A

OUT1B

S/H

ADC CORE

CHANNEL 2

ANALOG

INPUT

OUT2A

OUT2B

12-BIT

ADC CORE

DATA

SERIALIZER

SERIALIZED

CHANNEL 3

ANALOG

INPUT

OUT3A

OUT3B

–60

12-BIT

ADC CORE

LVDS

–70

OUTPUTS

–80

–90

–100

–110

–120

CHANNEL 4

ANALOG

INPUT

OUT4A

OUT4B

12-BIT

ADC CORE

DATA

CLOCK

OUT

ENCODE

INPUT

PLL

FREQUENCY (MHz)

FRAME

217512 TA01b

GND

OGND

217512 TA01

21754312fa

12 3 4 5 6 7...34

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