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LS121_SOIC

更新时间: 2024-11-07 11:43:27
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MICROSS 晶体晶体管
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描述
MONOLITHIC DUAL NPN TRANSISTOR

LS121_SOIC 数据手册

  
LS121  
MONOLITHIC DUAL  
NPN TRANSISTOR  
Linear Systems replaces discontinued Intersil IT121  
FEATURES  
The LS121 is a monolithic pair of NPN transistors  
Direct Replacement for INTERSIL LS121  
HIGH hFE @ LOW CURRENT  
OUTPUT CAPACITANCE  
mounted in a single SOIC package. The monolithic dual  
chip design reduces parasitics and gives better  
performance while ensuring extremely tight matching.  
The LS121 is a direct replacement for discontinued  
Intersil IT121.  
80 @ 10µA  
2.0pF  
10µV°C  
VBE tracking  
ABSOLUTE MAXIMUM RATINGS 1  
@ 25°C (unless otherwise noted)  
The 8 Pin SOIC provides ease of manufacturing, and  
the symmetrical pinout prevents improper orientation.  
Maximum Temperatures  
Storage Temperature  
65°C to +200°C  
55°C to +150°C  
(See Packaging Information).  
Operating Junction Temperature  
Maximum Power Dissipation  
Continuous Power Dissipation (One side)  
Continuous Power Dissipation (Both sides)  
Linear Derating factor (One side)  
Linear Derating factor (Both sides)  
Maximum Currents  
LS121 Features:  
250mW  
500mW  
2.3mW/°C  
4.3mW/°C  
ƒ
ƒ
ƒ
ƒ
High hfe at low current  
Tight matching  
Tight VBE tracking  
Low Output Capacitance  
Collector Current  
10mA  
MATCHING CHARACTERISTICS @ 25°C (unless otherwise stated)  
SYMBOL  
|VBE1 – VBE2  
|(VBE1 – VBE2)| / T  
CHARACTERISTIC  
MIN  
‐‐  
‐‐  
TYP  
‐‐  
‐‐  
MAX  
3
10  
UNITS  
mV  
µV/°C  
CONDITIONS  
|
Base Emitter Voltage Differential  
Base Emitter Voltage Differential  
Change with Temperature  
Base Current Differential  
IC = 10µA, VCE = 5V  
IC = 10µA, VCE = 5V  
TA = 55°C to +125°C  
IC = 10µA, VCE = 5V  
|IB1 IB2  
|
‐‐  
‐‐  
25  
nA  
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)  
SYMBOL  
BVCBO  
BVCEO  
BVEBO  
BVCCO  
hFE  
CHARACTERISTICS  
MIN.  
45  
TYP.  
‐‐  
MAX.  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
0.5  
1
1
2
2
10  
‐‐  
3
UNITS  
V
V
V
V
CONDITIONS  
IC = 10µA, IE = 0  
Collector to Base Voltage  
Click To Buy  
Collector to Emitter Voltage  
EmitterBase Breakdown Voltage  
Collector to Collector Voltage  
DC Current Gain  
45  
6.2  
60  
80  
100  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
IC = 10µA, IB = 0  
IE = 10µA, IC = 02  
IC = 10µA, IE = 0  
IC = 10µA, VCE = 5V  
IC = 1.0mA, VCE = 5V  
IC = 0.5mA, IB = 0.05mA  
IC = 0, VEB = 3V  
VCE(SAT)  
IEBO  
ICBO  
COBO  
CC1C2  
IC1C2  
fT  
Collector Saturation Voltage  
Emitter Cutoff Current  
V
nA  
nA  
pF  
Collector Cutoff Current  
Output Capacitance  
Collector to Collector Capacitance  
Collector to Collector Leakage Current  
Current Gain Bandwidth Product  
Narrow Band Noise Figure  
IE = 0, VCB = 45V  
IE = 0, VCB = 5V  
VCC = 0V  
VCC = ±60V  
pF  
‐‐  
180  
‐‐  
nA  
MHz  
dB  
IC = 1mA, VCE = 5V  
IC = 100µA, VCE = 5V, BW=200Hz, RG= 10KΩ,  
f = 1KHz  
NF  
Notes:  
1. Absolute Maximum ratings are limiting values above which serviceability may be impaired  
2. The reverse basetoemitter voltage must never exceed 6.2 volts; the reverse basetoemitter current must never exceed 10µA.  
SOIC (Top View)  
Available Packages:  
LS121 in SOIC  
LS121 available as bare die  
Please contact Micross for full package and die dimensions:  
Email: chipcomponents@micross.com  
Web: www.micross.com/distribution.aspx  
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or  
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.  

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