Datasheet > LPC54101J512BD64QL

LPC54101J512BD64QL

更新时间： 2024-02-02 09:13:51

品牌	Logo	应用领域
恩智浦 - NXP		时钟 PC 微控制器外围集成电路
页数	文件大小	规格书
90页	1700K
描述
LPC54101J512BD64 - Low Power 32-bit Microcontroller based on ARM® Cortex®-M4 QFP 64-Pin

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LPC54101J512BD64QL 技术参数

是否Rohs认证：	符合	生命周期：	Active
零件包装代码：	QFP	包装说明：	LFQFP,
针数：	64	Reach Compliance Code：	compliant
风险等级：	2.32	Is Samacsys：	N
具有ADC：	YES	地址总线宽度：
位大小：	32	最大时钟频率：	25 MHz
DAC 通道：	NO	DMA 通道：	YES
外部数据总线宽度：		JESD-30 代码：	S-PQFP-G64
长度：	10 mm	湿度敏感等级：	1
I/O 线路数量：	50	端子数量：	64
片上程序ROM宽度：	8	最高工作温度：	105 °C
最低工作温度：	-40 °C	PWM 通道：	YES
封装主体材料：	PLASTIC/EPOXY	封装代码：	LFQFP
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	NOT SPECIFIED	RAM（字节）：	106496
ROM（单词）：	524288	ROM可编程性：	FLASH
座面最大高度：	1.6 mm	速度：	100 MHz
最大供电电压：	3.6 V	最小供电电压：	1.62 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	10 mm	uPs/uCs/外围集成电路类型：	MICROCONTROLLER, RISC
Base Number Matches：	1

LPC54101J512BD64QL 数据手册

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LPC5410x

NXP Semiconductors

32-bit ARM Cortex-M4/M0+ microcontroller

 ARM Cortex-M0+ core (version r0p1):

 ARM Cortex-M0+ processor, running at a frequency of up to 100 MHz.

 ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).

 Non-maskable Interrupt (NMI) input with a selection of sources.

 Serial Wire Debug with four breakpoints and two watch points.

 System tick timer.

 On-chip memory:

 Up to 512 kB on-chip flash program memory with flash accelerator and 256 byte

page erase and write.

 104 kB total SRAM composed of:

 Up to 96 kB contiguous main SRAM.

 An additional 8 kB SRAM.

 ROM API support:

 Flash In-Application Programming (IAP) and In-System Programming (ISP).

 Power control API.

 Serial interfaces:

 Four USART interfaces with synchronous mode and 32 kHz mode for wake-up

from deep sleep and power down modes. The USARTs have FIFO support from

the System FIFO and share a fractional baud-rate generator.

 Two SPI interfaces, each with four slave selects and flexible data configuration.

The SPIs have FIFO support from the System FIFO. The slave function is able to

wake up the device from deep sleep and power down modes.

 Three I²C-bus interfaces supporting fast mode and Fast-mode Plus with data rates

of up to 1Mbit/s and with multiple address recognition and monitor mode. Each

I²C-bus interface also supports High Speed Mode (3.4 Mbit/s) as a slave. The slave

function is able to wake up the device from deep sleep and power down modes.

 Digital peripherals:

 DMA controller with 22 channels and 20 programmable triggers, able to access all

memories and DMA-capable peripherals.

 Up to 50 General-Purpose Input/Output (GPIO) pins. Most GPIOs have

configurable pull-up/pull-down resistors, programmable open-drain mode, and

input inverter.

 GPIO registers are located on the AHB for fast access. The DMA supports GPIO

ports.

 Up to eight GPIOs (pin interrupts) can be selected as edge-sensitive (rising or

falling edges or both) interrupt requests or level-sensitive (active low or active high)

interrupt requests. In addition, up to eight GPIOs can be selected to contribute a

boolean expression and interrupt generation using the pattern match engine block.

 Two GPIO grouped interrupts (GINT) enable an interrupt based on a logical

(AND/OR) combination of input states.

 CRC engine.

 Timers:

 Five 32-bit standard general purpose timers/counters, four of which support up to 4

capture inputs and 4 compare outputs, PWM mode, and external count input.

Specific timer events can be selected to generate DMA requests. The fifth timer

does not have external pin connections and may be used for internal timing

operations.

LPC5410x

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2.9 — 26 January 2018

2 of 90

123 4 5 6 7...90

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与LPC54101J512BD64QL相关器件

型号	品牌	描述	获取价格	数据表
LPC54101J512UK49	NXP	32-bit ARM Cortex-M4/M0 MCU; 104 kB SRAM; 512 kB flash, 3 x I2C, 2 x SPI, 4 x USART, 32-bi	获取价格
LPC54101J512UK49Z	NXP	LPC54101J512UK49 - Low Power 32-bit Microcont	获取价格
LPC54102J256BD64	NXP	32-bit ARM Cortex-M4/M0 MCU; 104 kB SRAM; 512 kB flash, 3 x I2C, 2 x SPI, 4 x USART, 32-bi	获取价格
LPC54102J256BD64QL	NXP	LPC54102J256BD64 - Low Power 32-bit Microcont	获取价格
LPC54102J256UK49	NXP	32-bit ARM Cortex-M4/M0 MCU; 104 kB SRAM; 512 kB flash, 3 x I2C, 2 x SPI, 4 x USART, 32-bi	获取价格
LPC54102J256UK49Z	NXP	LPC54102J256UK49 - Low Power 32-bit Microcont	获取价格

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