Datasheet > LPC5410X

LPC5410X

更新时间： 2022-05-14 22:20:34

品牌	Logo	应用领域
恩智浦 - NXP		静态存储器
页数	文件大小	规格书
95页	2142K
描述
32-bit ARM Cortex-M4/M0 MCU; 104 kB SRAM; 512 kB flash, 3 x I2C, 2 x SPI, 4 x USART, 32-bit counter/ timers, SCTimer/PWM, 12-bit 5.0 Msamples/sec ADC

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LPC5410X 数据手册

LPC5410x

32-bit ARM Cortex-M4/M0+ MCU; 104 kB SRAM; 512 kB flash,

3 x I2C, 2 x SPI, 4 x USART, 32-bit counter/ timers,

SCTimer/PWM, 12-bit 5.0 Msamples/sec ADC

Rev. 2.11 — 19 September 2019

Product data sheet

1. General description

The LPC5410x are ARM Cortex-M4 based microcontrollers for embedded applications.

These devices include:

• Optional ARM Cortex-M0+ coprocessor.

• 104 kB of on-chip SRAM.

• Up to 512 kB on-chip flash.

• State-Configurable Timer with PWM capabilities (SCTimer/PWM).

• RTC/alarm timer.

• 24-bit Multi-Rate Timer (MRT).

• 12-bit 5.0 Msamples/sec ADC.

• Repetitive Interrupt Timer (RIT).

• Windowed Watchdog Timer (WWDT).

• Two SPIs.

• Three Fast-mode plus I²C-bus interfaces with high-speed slave mode.

• Four USARTs.

• Five general-purpose timers.

The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power

consumption, enhanced debug features, and a high level of support block integration. The

ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with

separate local instruction and data buses as well as a third bus for peripherals, and

includes an internal prefetch unit that supports speculative branching. The ARM

Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A

hardware floating-point unit is integrated in the core.

The ARM Cortex-M0+ coprocessor is an energy-efficient and easy-to-use 32-bit core

which is code and tool-compatible with the Cortex-M4 core. The Cortex-M0+ coprocessor

offers up to 150 MHz performance with a simple instruction set and reduced code size. In

LPC5410x, the Cortex-M0 coprocessor hardware multiply is implemented as a 32-cycle

iterative multiplier.

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