October 2006
LMX2485/LMX2485E
50 MHz - 3.0 GHz High Performance Delta-Sigma Low
™
Power Dual PLLatinum Frequency Synthesizers with
800 MHz Integer PLL
n Direct digital modulation applications
General Description
n Satellite and cable TV tuners
The LMX2485 is a low power, high performance delta-sigma
n WLAN Standards
fractional-N PLL with an auxiliary integer-N PLL. The device
is fabricated using National Semiconductor’s advanced pro-
cess.
Features
With delta-sigma architecture, fractional spurs at lower offset
frequencies are pushed to higher frequencies outside the
loop bandwidth. The ability to push close in spur and phase
noise energy to higher frequencies is a direct function of the
modulator order. Unlike analog compensation, the digital
feedback technique used in the LMX2485 is highly resistant
to changes in temperature and variations in wafer process-
ing. The LMX2485 delta-sigma modulator is programmable
up to fourth order, which allows the designer to select the
optimum modulator order to fit the phase noise, spur, and
lock time requirements of the system.
Quadruple Modulus Prescalers for Lower Divide Ratios
n RF PLL: 8/9/12/13 or 16/17/20/21
n IF PLL: 8/9 or 16/17
Advanced Delta Sigma Fractional Compensation
n 12 bit or 22 bit selectable fractional modulus
n Up to 4th order programmable delta-sigma modulator
Features for Improved Lock Times and Programming
n Fastlock / Cycle slip reduction
n Integrated time-out counter
n Single word write to change frequencies with Fastlock
Serial data for programming the LMX2485 is transferred via
a three line high speed (20 MHz) MICROWIRE interface.
The LMX2485 offers fine frequency resolution, low spurs,
fast programming speed, and a single word write to change
the frequency. This makes it ideal for direct digital modula-
tion applications, where the N counter is directly modulated
with information. The LMX2485 is available in a 24 lead
4.0 X 4.0 X 0.8 mm LLP package.
Wide Operating Range
n LMX2485 RF PLL: 500 MHz to 3.0 GHz
n LMX2485E RF PLL: 50 MHz to 3.0 GHz
Useful Features
n Digital lock detect output
n Hardware and software power-down control
n On-chip crystal reference frequency doubler.
n RF phase comparison frequency up to 50 MHz
n 2.5 to 3.6 volt operation with ICC = 5.0 mA at 3.0 V
Applications
n Cellular phones and base stations
CDMA, WCDMA, GSM/GPRS, TDMA, EDGE, PDC
Functional Block Diagram
20087701
™
PLLatinum is a trademark of National Semiconductor Corporation.
© 2006 National Semiconductor Corporation
DS200877
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