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LM8333GGR8X PDF预览

LM8333GGR8X

更新时间: 2024-01-18 16:59:09
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
20页 545K
描述
IC SPECIALTY MICROPROCESSOR CIRCUIT, PBGA49, MICRO ARRAY-49, Microprocessor IC:Other

LM8333GGR8X 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:MICRO ARRAY-49Reach Compliance Code:unknown
HTS代码:8542.31.00.01风险等级:5.07
JESD-30 代码:S-PBGA-B49JESD-609代码:e1
长度:4 mm湿度敏感等级:1
端子数量:49最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TFBGA封装等效代码:BGA49,7X7,20
封装形状:SQUARE封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH
电源:2.5 V认证状态:Not Qualified
座面最大高度:1.1 mm子类别:Other Microprocessor ICs
最大压摆率:6 mA最大供电电压:2.75 V
最小供电电压:2.25 V标称供电电压:2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM宽度:4 mm
uPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUITBase Number Matches:1

LM8333GGR8X 数据手册

 浏览型号LM8333GGR8X的Datasheet PDF文件第2页浏览型号LM8333GGR8X的Datasheet PDF文件第3页浏览型号LM8333GGR8X的Datasheet PDF文件第4页浏览型号LM8333GGR8X的Datasheet PDF文件第5页浏览型号LM8333GGR8X的Datasheet PDF文件第6页浏览型号LM8333GGR8X的Datasheet PDF文件第7页 
January 13, 2010  
LM8333  
Mobile I/O Companion Supporting Key-Scan, I/O  
Expansion, PWM, and ACCESS.bus Host Interface  
The device is packaged in a 32–pin Leadless Leadframe  
package (LLP) and a 49-pin MICRO-ARRAY . Both are chip-  
scale packages.  
1.0 General Description  
The LM8333 Mobile I/O Companion offloads the burden of  
keyboard scanning from the host, while providing extremely  
low power consumption in both operational and standby  
modes. It supports keypad matrices up to 8 × 8 in size (plus  
another 8 special-function keys), for portable applications  
such as cellphones, PDAs, games, and other handheld ap-  
plications.  
2.0 Features  
8 × 8 standard keys  
8 special function keys (SF keys) providing a total of 72  
keys for the maximum keyboard matrix  
ACCESS.bus (I2C-compatible) communication interface  
to the host  
Key press and release events are encoded into a byte format  
and loaded into a FIFO buffer for retrieval by the host pro-  
cessor. An interrupt output (IRQ) is used to signal events such  
as keypad activity, a state change on either of two interrupt-  
capable general-purpose I/O pins, or an error condition. In-  
terrupt and error codes are available to the host by reading  
dedicated registers.  
Four general purpose host programmable I/O pins with  
two optional (slow) external Interrupts  
16 byte FIFO buffer to store key pressed and key released  
events  
Error control with error reports on (FIFO overrun, Keypad  
overrun, invalid command)  
Four general-purpose I/O pins are available, two of which  
have interrupt capability. A pulse-width modulated output  
based on a host-programmable internal timer is also avail-  
able, which can be used as a general-purpose output if the  
PWM function is not required.  
Host programmable PWM  
Host programmable active time and debounce time  
3.0 Applications  
To minimize power, the LM8333 automatically enters a low-  
power standby mode when there is no keypad, I/O, or host  
activity.  
Mobile phones  
Personal Digital Assistants (PDAs)  
Smart handheld devices  
Personal media players  
4.0 Block Diagram  
20210601  
I2C® is a registered trademark of Phillips Corporation.  
© 2010 National Semiconductor Corporation  
202106  
www.national.com  
 
 
 
 

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