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LM1881N-X/NOPB PDF预览

LM1881N-X/NOPB

更新时间: 2024-02-03 19:22:00
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
18页 1117K
描述
SYNC SEPARATOR IC, PDIP8, PLASTIC, DIP-8

LM1881N-X/NOPB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP8,.3针数:8
Reach Compliance Code:compliant风险等级:5.66
商用集成电路类型:SYNC SEPARATOR ICJESD-30 代码:R-PDIP-T8
JESD-609代码:e3长度:9.817 mm
湿度敏感等级:1功能数量:1
端子数量:8最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP8,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):260电源:5/12 V
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Other Consumer ICs最大压摆率:12 mA
最大供电电压 (Vsup):12 V最小供电电压 (Vsup):5 V
表面贴装:NO技术:BIPOLAR
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:7.62 mmBase Number Matches:1

LM1881N-X/NOPB 数据手册

 浏览型号LM1881N-X/NOPB的Datasheet PDF文件第4页浏览型号LM1881N-X/NOPB的Datasheet PDF文件第5页浏览型号LM1881N-X/NOPB的Datasheet PDF文件第6页浏览型号LM1881N-X/NOPB的Datasheet PDF文件第8页浏览型号LM1881N-X/NOPB的Datasheet PDF文件第9页浏览型号LM1881N-X/NOPB的Datasheet PDF文件第10页 
LM1881  
www.ti.com  
SNLS384F FEBRUARY 1995REVISED MARCH 2013  
*Components Optional, See Text  
Figure 9.  
ODD/EVEN FIELD PULSE  
An unusual feature of LM1881 is an output level from Pin 7 that identifies the video field present at the input to  
the LM1881. This can be useful in frame memory storage applications or in extracting test signals that occur in  
alternate fields. For a composite video signal that is interlaced, one of the two fields that make up each video  
frame or picture must have a half horizontal scan line period at the end of the vertical scan—i.e., at the bottom of  
the picture. This is called the “odd field” or “even field”. The “even field” or “field 2” has a complete horizontal  
scan line at the end of the field. An odd field starts on the leading edge of the first equalizing pulse, whereas the  
even field starts on the leading edge of the second equalizing pulse of the vertical retrace interval. Figure 8(a)  
shows the end of the even field and the start of the odd field.  
To detect the odd/even fields the LM1881 again integrates the composite sync waveform (Figure 9). A capacitor  
is charged during the period between sync pulses and discharged when the sync pulse is present. The period  
between normal horizontal sync pulses is enough to allow the capacitor voltage to reach a threshold level of a  
comparator that clears a flip-flop which is also being clocked by the sync waveform. When the vertical interval is  
reached, the shorter integration time between equalizing pulses prevents this threshold from being reached and  
the Q output of the flip-flop is toggled with each equalizing pulse. Since the half line period at the end of the odd  
field will have the same effect as an equalizing pulse period, the Q output will have a different polarity on  
successive fields. Thus by comparing the Q polarity with the vertical output pulse, an odd/even field index is  
generated. Pin 7 remains low during the even field and high during the odd field.  
Copyright © 1995–2013, Texas Instruments Incorporated  
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Product Folder Links: LM1881  
 

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