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LF3320QC9 PDF预览

LF3320QC9

更新时间： 2024-01-06 15:27:26
品牌 Logo 应用领域
逻辑 - LOGIC 时钟LTE外围集成电路
页数 文件大小 规格书
24页 1050K
描述
Digital Filter, 12-Bit, CMOS, PQFP144, PLASTIC, QFP-144

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LF3320QC9 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Contact Manufacturer零件包装代码：QFP
包装说明：QFP, QFP144,1.2SQ针数：144
Reach Compliance Code：compliantECCN代码：3A001.A.3
HTS代码：8542.39.00.01风险等级：5.73
边界扫描：NO最大时钟频率：83 MHz
外部数据总线宽度：12JESD-30 代码：S-PQFP-G144
长度：28 mm低功率模式：NO
湿度敏感等级：1端子数量：144
最高工作温度：70 °C最低工作温度：
输出数据总线宽度：16封装主体材料：PLASTIC/EPOXY
封装代码：QFP封装等效代码：QFP144,1.2SQ
封装形状：SQUARE封装形式：FLATPACK
峰值回流温度（摄氏度）：225电源：3.3 V
认证状态：Not Qualified座面最大高度：4.0995 mm
子类别：DSP Peripherals最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：0.65 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：28 mm
uPs/uCs/外围集成电路类型：DSP PERIPHERAL, DIGITAL FILTERBase Number Matches：1

LF3320QC9 数据手册

 浏览型号LF3320QC9的Datasheet PDF文件第2页浏览型号LF3320QC9的Datasheet PDF文件第3页浏览型号LF3320QC9的Datasheet PDF文件第4页浏览型号LF3320QC9的Datasheet PDF文件第5页浏览型号LF3320QC9的Datasheet PDF文件第6页浏览型号LF3320QC9的Datasheet PDF文件第7页 
DEVICES INCORPORATED  
LF3320  
Horizontal Digital Image Filter  
FEATURES  
DESCRIPTION  
ꢀ 83 MHz Data Rate  
ꢀ 12-bit Data or Coefficients (Expand-  
The LF3320 filters digital images in  
the horizontal dimension at real-time  
Interleave/Decimation Registers (I/D  
Registers) allow interleaved data to be  
video rates. The input and coefficient fed directly into the device and fil-  
data are both 12 bits and in two’s com- tered without separating the data into  
plement format. The output is also in individual data streams.  
two’s complement format and may be  
able to 24-bit)  
ꢀ 32-Tap FIR Filter, Cascadable for  
More Filter Taps  
ꢀ Over 49 K-bits of on-board Memory  
ꢀ LF InterfaceTM Allows All 256 Coef-  
ficient Sets to be Updated Within  
Vertical Blanking  
ꢀ Various Operating Modes: Dual  
Filter, Single Filter, Double Wide  
Data or Coefficient, Matrix Multi-  
plication, and Accumulator Access.  
ꢀ Selectable 16-bit Data Output with  
User-Defined Rounding and Limit-  
ing  
The LF3320 can handle a maximum of  
rounded to 16 bits.  
sixteen data sets interleaved together.  
The LF3320 is designed to take advan- The I/D Registers and on-chip accu-  
tage of symmetric coefficient sets.  
When symmetric coefficient sets are  
used, the device can be configured as  
a single 32-tap FIR filter or as two sep-  
arate 16-tap FIR filters.  
mulators facilitate using decimation  
to increase the number of filter taps.  
Decimation of up to 16:1 is supported.  
The LF3320 contains enough on-board  
memory to store 256 coefficient sets.  
Two separate LF InterfacesTM allow  
all 256 coefficient sets to be updated  
within vertical blanking.  
When asymmetric coefficient sets are  
used, the device can be configured  
as a single 16-tap FIR filter or as  
two separate 8-tap FIR filters. Mul-  
tiple LF3320s can be cascaded to create  
larger filters.  
ꢀ Supports Interleaved Data Streams  
ꢀ Supports Decimation up to 16:1 for  
Increasing Number of Filter Taps  
ꢀ 3.3 Volt Supply  
ꢀ 144 Lead PQFP  
NOTE: loading registers via the LF  
interface must not exceed 90MHz. The  
PAUSE pin must be used to throttle  
back the LF interface at clock speeds  
above 90MHz.  
LF3320 BLOCK DIAGRAM  
12  
12  
ROUT11-0  
RIN11-0  
INTERLEAVE / DECIMATION  
REGISTERS  
12  
12  
DIN11-0  
COUT11-0  
8
8
CAA7-0  
CAB7-0  
CENA  
12  
CFA11-0  
PAUSEA  
LDA  
CENB  
12  
256  
256  
CFB11-0  
PAUSEB  
LDB  
COEFFICIENT  
SET  
COEFFICIENT  
SET  
16-TAP  
16-TAP  
FILTER A  
FILTER B  
STORAGE  
STORAGE  
ROUND  
SELECT  
LIMIT  
CIRCUITRY  
CLK  
OED  
16  
DOUT15-0  
Video Imaging Products  
6/22/2007–LDS.3320-R  
2-1  
1234567...24

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