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LAN9215-MZP PDF预览

LAN9215-MZP

更新时间： 2024-02-07 05:22:26
品牌 Logo 应用领域
SMSC 局域网（LAN）标准PC
页数 文件大小 规格书
144页 2150K
描述
16-bit Non-PCI 10/100 Ethernet Controller with HP Auto-MDIX Support

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中文翻译

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LAN9215-MZP 技术参数

生命周期：Transferred零件包装代码：BGA
包装说明：ROHS COMPLIANT, LFBGA-100针数：100
Reach Compliance Code：unknownHTS代码：8542.31.00.01
风险等级：5.73地址总线宽度：7
边界扫描：NO最大时钟频率：25 MHz
数据编码/解码方法：NRZI; BIPH-LEVEL(MANCHESTER)最大数据传输速率：12.5 MBps
外部数据总线宽度：16JESD-30 代码：S-PBGA-B100
长度：10 mm低功率模式：YES
串行 I/O 数：1端子数量：100
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：LFBGA
封装形状：SQUARE封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH
认证状态：Not Qualified座面最大高度：1.7 mm
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：1.8 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM宽度：10 mm
uPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, LANBase Number Matches：1

LAN9215-MZP 数据手册

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LAN9215  
16-bit Non-PCI 10/100 Ethernet  
Controller with HP Auto-MDIX Support  
Datasheet  
PRODUCT FEATURES  
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Single chip Ethernet controller  
Highlights  
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Fully compliant with IEEE 802.3/802.3u standards  
Integrated Ethernet MAC and PHY  
10BASE-T and 100BASE-TX support  
Full- and Half-duplex support  
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Optimized for medium performance applications  
Efficient architecture with low CPU overhead  
Easily interfaces to most 16-bit embedded CPU’s  
Integrated PHY with HP Auto-MDIX support  
Full-duplex flow control  
Backpressure for half-duplex flow control  
Preamble generation and removal  
Automatic 32-bit CRC generation and checking  
Automatic payload padding and pad removal  
Loop-back modes  
Supports audio & video streaming over Ethernet:  
multiple standard-definition (SD) MPEG2 streams  
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Compatible with other members of LAN9218 family  
Target Applications  
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Flexible address filtering modes  
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One 48-bit perfect address  
64 hash-filtered multicast addresses  
Pass all multicast  
Promiscuous mode  
Inverse filtering  
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Basic cable, satellite, and IP set-top boxes  
Digital video recorders  
Video-over IP solutions, IP PBX & video phones  
Wireless routers & access points  
Audio distribution systems  
Pass all incoming with status report  
Disable reception of broadcast packets  
Printers, kiosks, security systems  
General embedded applications  
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Integrated 10/100 Ethernet PHY  
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Supports HP Auto-MDIX  
Auto-negotiation  
Supports energy-detect power down  
Key Benefits  
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Non-PCI Ethernet controller for medium performance  
applications  
Host bus interface  
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Simple, SRAM-like interface  
16-bit data bus  
16Kbyte FIFO with flexible TX/RX allocation  
One configurable host interrupt  
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16-bit interface  
Burst-mode read support  
External MII Interface  
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Eliminates dropped packets  
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Miscellaneous features  
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Internal buffer memory can store over 200 packets  
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Low-profile 100-pin TQFP, or 100-ball LFBGA lead-free  
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Automatic PAUSE and back-pressure flow control  
RoHS Compliant package  
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Integrated 1.8V regulator  
General Purpose Timer  
Optional EEPROM interface  
Support for 3 status LEDs multiplexed with  
Programmable GPIO signals  
Minimizes CPU overhead  
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Supports Slave-DMA  
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Interrupt Pin with Programmable Hold-off timer  
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Reduces system cost and increases design flexibility  
SRAM-like interface easily interfaces to most  
embedded CPU’s or SoC’s  
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Single 3.3V Power Supply with 5V tolerant I/O  
0°C to +70°C Commercial Temperature Support  
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Reduced Power Modes  
* Third-party brands and names are the property of their respective  
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Numerous power management modes  
Wake on LAN*  
Magic packet wakeup*  
Wakeup indicator event signal  
Link Status Change  
owners.  
SMSC LAN9215  
DATASHEET  
Revision 2.9 (03-01-12)  
1234567...144

中文翻译

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