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LAN9218_07 PDF预览

LAN9218_07

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
SMSC 控制器以太网局域网(LAN)标准
页数 文件大小 规格书
133页 1505K
描述
High-Performance Single- Chip 10/100 Ethernet Controller with HP Auto-MDIX

LAN9218_07 数据手册

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LAN9218  
High-Performance Single-  
Chip 10/100 Ethernet  
Controller with HP Auto-MDIX  
Datasheet  
PRODUCT FEATURES  
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Reduced Power Modes  
Highlights  
Numerous power management modes  
Wake on LAN*  
Magic packet wakeup*  
Wakeup indicator event signal  
Link Status Change  
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Optimized for the highest performance applications  
Efficient architecture with low CPU overhead  
Easily interfaces to most 32-bit and 16-bit embedded  
CPU’s  
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Single chip Ethernet controller  
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Integrated PHY with HP Auto-MDIX  
Fully compliant with IEEE 802.3/802.3u standards  
Integrated Ethernet MAC and PHY  
10BASE-T and 100BASE-TX support  
Full- and Half-duplex support  
Supports audio & video streaming over Ethernet:  
multiple high-definition (HD) MPEG2 streams  
„
Compatible with other members of LAN9218 family  
Full-duplex flow control  
Target Applications  
Backpressure for half-duplex flow control  
Preamble generation and removal  
Automatic 32-bit CRC generation and checking  
Automatic payload padding and pad removal  
Loop-back modes  
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Video distribution systems, multi-room PVR  
Cable, satellite, and IP set-top boxes  
Digital video recorders and DVD recorder/players  
High definition televisions  
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Flexible address filtering modes  
One 48-bit perfect address  
64 hash-filtered multicast addresses  
Pass all multicast  
Promiscuous mode  
Inverse filtering  
Digital media clients/servers and home gateways  
Video-over IP solutions, IP PBX & video phones  
Wireless routers & access points  
High-end audio distribution systems  
Pass all incoming with status report  
Disable reception of broadcast packets  
Key Benefits  
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Integrated 10/100 Ethernet PHY  
Supports HP Auto-MDIX  
Auto-negotiation  
Supports energy-detect power down  
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Non-PCI Ethernet controller for the highest  
performance applications  
Highest performing non-PCI Ethernet controller  
32-bit interface with fast bus cycle times  
Burst-mode read support  
High-Performance host bus interface  
Simple, SRAM-like interface  
32 or 16-bit data bus  
16Kbyte FIFO with flexible TX/RX allocation  
One configurable host interrupt  
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Eliminates dropped packets  
Internal buffer memory can store over 200 packets  
Automatic PAUSE and back-pressure flow control  
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Miscellaneous features  
Minimizes CPU overhead  
Low-profile, 100-pin TQFP lead-free RoHS Compliant  
Supports Slave-DMA  
package  
Interrupt Pin with Programmable Hold-off timer  
Integrated 1.8V regulator  
General Purpose Timer  
Optional EEPROM interface  
Support for 3 status LEDs multiplexed with  
Programmable GPIO signals  
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Reduces system cost and increases design flexibility  
SRAM-like interface easily interfaces to most  
embedded CPU’s or SoC’s  
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Single 3.3V Power Supply with 5V tolerant I/O  
0°C to +70°C Commercial Temperature Support  
* Third-party brands and names are the property of their respective  
owners.  
SMSC LAN9218  
DATASHEET  
Revision 1.8 (06-06-07)  

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