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LAN9215 PDF预览

LAN9215

更新时间: 2024-09-28 04:21:03
品牌 Logo 应用领域
SMSC 控制器以太网局域网(LAN)标准
页数 文件大小 规格书
134页 1595K
描述
Highly Efficient 10/100 Ethernet Controller with HP Auto-MDIX

LAN9215 数据手册

 浏览型号LAN9215的Datasheet PDF文件第2页浏览型号LAN9215的Datasheet PDF文件第3页浏览型号LAN9215的Datasheet PDF文件第4页浏览型号LAN9215的Datasheet PDF文件第5页浏览型号LAN9215的Datasheet PDF文件第6页浏览型号LAN9215的Datasheet PDF文件第7页 
LAN9215  
Highly Efficient Single-Chip  
10/100 Ethernet Controller  
with HP Auto-MDIX  
Datasheet  
PRODUCT FEATURES  
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Reduced Power Modes  
Highlights  
Numerous power management modes  
Wake on LAN*  
Magic packet wakeup*  
Wakeup indicator event signal  
Link Status Change  
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Optimized for medium performance applications  
Efficient architecture with low CPU overhead  
Easily interfaces to most 16-bit embedded CPU’s  
Integrated PHY with HP Auto-MDIX  
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Single chip Ethernet controller  
Supports audio & video streaming over Ethernet:  
multiple standard-definition (SD) MPEG2 streams  
Fully compliant with IEEE 802.3/802.3u standards  
Integrated Ethernet MAC and PHY  
10BASE-T and 100BASE-TX support  
Full- and Half-duplex support  
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Compatible with other members of LAN9218 family  
Target Applications  
Full-duplex flow control  
Backpressure for half-duplex flow control  
Preamble generation and removal  
Automatic 32-bit CRC generation and checking  
Automatic payload padding and pad removal  
Loop-back modes  
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Basic cable, satellite, and IP set-top boxes  
Digital video recorders  
Video-over IP Solutions, IP PBX & video phones  
Wireless routers & access points  
Audio distribution systems  
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Flexible address filtering modes  
One 48-bit perfect address  
64 hash-filtered multicast addresses  
Pass all multicast  
Promiscuous mode  
Inverse filtering  
Printers, kiosks, security systems  
General embedded applications  
Key Benefits  
Pass all incoming with status report  
Disable reception of broadcast packets  
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Non-PCI Ethernet controller for medium performance  
applications  
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Integrated 10/100 Ethernet PHY  
16-bit interface  
Burst-mode read support  
External MII Interface  
Supports HP Auto-MDIX  
Auto-negotiation  
Supports energy-detect power down  
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Eliminates dropped packets  
High-Performance host bus interface  
Internal buffer memory can store over 200 packets  
Simple, SRAM-like interface  
16-bit data bus  
16Kbyte FIFO with flexible TX/RX allocation  
One configurable host interrupt  
Automatic PAUSE and back-pressure flow control  
Minimizes CPU overhead  
Supports Slave-DMA  
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Miscellaneous features  
Interrupt Pin with Programmable Hold-off timer  
Low-profile, green, lead-free 100-pin TQFP package  
Integrated 1.8V regulator  
General Purpose Timer  
Optional EEPROM interface  
Support for 3 status LEDs multiplexed with  
Programmable GPIO signals  
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Reduces system cost and increases design flexibility  
SRAM-like interface easily interfaces to most  
embedded CPU’s or SoC’s  
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Single 3.3V Power Supply with 5V tolerant I/O  
0 to 70°C Commercial Temperature Support  
* Third-party brands and names are the property of their respective  
owners.  
SMSC LAN9215  
DATASHEET  
Revision 1.5 (07-18-06)  

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