Datasheet > LAN9115

LAN9115

更新时间： 2023-12-06 20:10:41

品牌	Logo	应用领域
美国微芯 - MICROCHIP		局域网局域网（LAN）标准
页数	文件大小	规格书
114页	833K
描述
The LAN9115 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded appli

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LAN9115 数据手册

LAN9115

FIGURE 1-1:

SYSTEM BLOCK DIAGRAM UTILIZING THE LAN9115

System Memory

System

Peripherals

Optional

External

PHY

Magnetics

MII

Ethernet

Embedded

Microprocessor/

Microcontroller

LAN9115

Magnetics

System Bus

LEDS/GPIO

25MHz

XTAL

EEPROM

(Optional)

The Microchip LAN9115 integrated 10/100 MAC/PHY controller is a peripheral chip that performs the function of trans-

lating parallel data from a host controller into Ethernet packets. The LAN9115 Ethernet MAC/PHY controller is designed

and optimized to function in an embedded environment. All communication is performed with programmed I/O transac-

tions using the simple SRAM-like host interface bus.

The diagram shown above, describes a typical system configuration of the LAN9115 in a typical embedded environ-

ment.

The LAN9115 is a general purpose, platform independent, Ethernet controller. The LAN9115 consists of four major func-

tional blocks. The four blocks are:

• 10/100 Ethernet PHY

• 10/100 Ethernet MAC

• RX/TX FIFOs

• Host Bus Interface (HBI)

 2005-2018 Microchip Technology Inc.

DS00002269B-page 5

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