Datasheet > L64733

L64733

更新时间： 2024-11-12 05:41:19

品牌	Logo	应用领域
LSI		接收机
页数	文件大小	规格书
48页	454K
描述
Tuner and Satellite Receiver Chipset

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L64733 数据手册

L64733/L64734

Tuner and Satellite

Receiver Chipset

Datasheet

The L64733/34 chipset is designed speciﬁcally to meet the needs of

satellite broadcast digital TV and is compliant with the European digital

video broadcast (DVB-S) standard and the technical speciﬁcations for

DSS systems. The chipset forms a complete “L-Band to bits” system.

A typical application of the L64733/34 chipset is satellite digital TV

reception in accordance with ETS 300 421. Figure 1 shows the

L64733/34 chipset satellite receiver implemented in a typical satellite

receiver set-top decoder box.

Figure 1

Block Diagram of Set-Top Decoder Box Using the L64733/34 Chipset

Optional

DRAM

256K x 16

Decryption

Engine

L64733/L64734 Chipset

[7:0]

Satellite In

Transport

Demux

High-Speed

Port

L64733

L64734

RF Out

(Loop Through)

Microprocessor

Data and

Address Bus

27 MHz

VCXO

Microprocessor

Audio

Oversampling

Clock

NTSC

PAL

S-Video

CCIR601VIDEO

PAL / NTSC

Encoder

Audio/Video

Decoder

Audio/Video PES

64/32

SDRAM

256K x 64

256K x 32

L-Speaker

R-Speaker

PCM

Audio DAC

PCM AUDIO

The L64733/34 chipset consists of the L64734 Satellite Receiver IC, the

L64733 Tuner IC, and an on-chip synthesizer. Figure 2 shows a simpliﬁed

block diagram of this chipset.

August 2000

12 3 4 5 6 7...48

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