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KSZ8041MLLI PDF预览

KSZ8041MLLI

更新时间: 2024-11-06 19:20:23
品牌 Logo 应用领域
美国微芯 - MICROCHIP 局域网(LAN)标准以太网:16GBASE-T电信电信集成电路
页数 文件大小 规格书
63页 1439K
描述
IC TXRX PHY 10/100 3.3V 48LQFP

KSZ8041MLLI 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:LFQFP, QFP48,.35SQ,20Reach Compliance Code:compliant
Factory Lead Time:15 weeks风险等级:1.92
数据速率:0.1 MbpsJESD-30 代码:S-XQFP-G48
长度:7 mm功能数量:1
端子数量:48收发器数量:1
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP48,.35SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:1.6 mm最大压摆率:58.3 mA
标称供电电压:3.3 V表面贴装:YES
技术:CMOS电信集成电路类型:ETHERNET TRANSCEIVER
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7 mm
Base Number Matches:1

KSZ8041MLLI 数据手册

 浏览型号KSZ8041MLLI的Datasheet PDF文件第2页浏览型号KSZ8041MLLI的Datasheet PDF文件第3页浏览型号KSZ8041MLLI的Datasheet PDF文件第4页浏览型号KSZ8041MLLI的Datasheet PDF文件第5页浏览型号KSZ8041MLLI的Datasheet PDF文件第6页浏览型号KSZ8041MLLI的Datasheet PDF文件第7页 
KSZ8041TL/FTL/MLL  
10BASE-T/100BASE-TX/100BASE-FX  
Physical Layer Transceiver  
Applications  
Features  
• Printer  
• Single-Chip 10BASE-T/100BASE-TX/100BASE-  
FX Physical Layer Solution  
• LOM  
• Game Console  
• IPTV  
• Fully Compliant with IEEE 802.3u Standard  
• Low Power CMOS Design, Power Consumption  
of <180 mW  
• IP Phone  
• HP Auto MDI/MDI-X for Reliable Detection and  
Correction for Straight-Through and Crossover  
Cables with Disable and Enable Option  
• IP Set-Top Box  
• Media Converter  
• Robust Operation Over Standard Cables  
• LinkMD® TDR-Based Cable Diagnostics for Iden-  
tification of Faulty Copper Cabling  
• Power Down and Power Saving Modes  
• Fiber Support: 100BASE-FX (KSZ8041FTL Only)  
• Back-to-Back Mode Support for 100 Mbps  
Repeater or Media Converter  
• MII Interface Support  
• RMII Interface Support with External 50 MHz Sys-  
tem Clock (KSZ8041TL/FTL Only)  
• SMII Interface Support with External 125 MHz  
System Clock and 12.5 MHz Sync Clock from  
MAC (KSZ8041TL/FTL Only)  
• MIIM (MDC/MDIO) Management Bus to 12.5 MHz  
for Rapid PHY Register Configuration  
• Interrupt Pin Option  
• Programmable LED Outputs for Link, Activity, and  
Speed  
• Single Power Supply (3.3V)  
• Built-in 1.8V Regulator for Core  
• Available in 48-Pin LQFP (KSZ8041MLL) or 48-  
Pin TQFP (KSZ8041TL/FTL) Packages  
2017 Microchip Technology Inc.  
DS00002436B-page 1  

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