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KMC908KX2CP PDF预览

KMC908KX2CP

更新时间: 2024-11-06 21:04:31
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 时钟微控制器光电二极管外围集成电路
页数 文件大小 规格书
2页 437K
描述
Microcontroller, 8-Bit, FLASH, 8MHz, HCMOS, PDIP16, PLASTIC, DIP-16

KMC908KX2CP 技术参数

生命周期:Transferred零件包装代码:DIP
包装说明:DIP,针数:16
Reach Compliance Code:unknownECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:5.45
具有ADC:YES其他特性:OPERATES AT 3V SUPPLY @ 4MHZ
地址总线宽度:位大小:8
最大时钟频率:32 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:
JESD-30 代码:R-PDIP-T16长度:19.05 mm
I/O 线路数量:13端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:Not Qualified
ROM可编程性:FLASH座面最大高度:4.44 mm
速度:8 MHz最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:NO技术:HCMOS
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

KMC908KX2CP 数据手册

 浏览型号KMC908KX2CP的Datasheet PDF文件第2页 
A FLASH MCU SOLUTION  
68HC908KX8/KX2  
8-bit Microcontroller  
FEATURES  
BENEFITS  
TARGET APPLICATIONS  
HIGH-PERFORMANCE 68HC08 CPU CORE  
• Networked and control  
systems  
• Home and industrial security  
systems  
• Building control systems  
• Interconnected home  
appliances  
• 8 MHz bus operation at 5V operation for  
125 nsec minimum instruction cycle time  
• 4 MHz bus operation at 3V for 250 nsec  
minimum instruction cycle time  
• Efficient instruction set including multiply  
and divide  
• 16 flexible addressing modes including  
stack relative with 16-bit stack pointer  
• Object code compatible with the 68HC05  
• Easy to learn and use architecture  
• C optimized architecture provides compact  
code  
• Fluorescent light ballasts  
• Fully static low-voltage, low-power design  
with wait and stop modes  
INTEGRATED SECOND GENERATION FLASH MEMORY  
• In-application re-programmable  
• Extremely fast programming, encoding  
64 bytes in as fast as 2 msec  
• FLASH programming across the 68HC08’s  
full operating supply voltage with no extra  
programming voltage  
• 10K write/erase cycles minimum over  
temperature  
• Cost-effective programming changes and  
field software upgrades via in-application  
programmability and re-programmability  
• Reduces production programming costs  
through ultra-fast programming  
• Allows re-programmable battery-powered  
applications  
• Byte-writable for data as well as program  
memory  
• Protects code from unauthorized reading  
and to guard against unintentional  
erasing/writing of user-programmable  
segments of code  
The 68HC908KX8 and the 68HC908KX2  
maximize efficiency and reduce system  
costs with an internal clock generator  
which eliminates the need for an external  
clock source. Other valuable features  
include a serial communications interface  
(SCI) enabling high-speed communication,  
an analog-to-digital converter (ADC) and a  
timebase module (TBM) for more  
• Flexible block protection and security  
cost-effective processing.  
INTERNAL CLOCK GENERATOR  
• Software-selectable bus frequencies  
• 2% accurate with trim capability  
• Clock monitor  
• Option to allow use of external clock source  
or external crystal/ceramic resonator  
• Eliminates the need and cost for an  
external clock source  
• Improved accuracy across temperature and  
voltage  
5
KBI  
CPU08  
PORT A  
192 RAM  
8K/2K  
FLASH  
8-BIT ANALOG-TO-DIGITAL CONVERTER  
4 CHANNEL/  
8-BIT ADC  
MON  
BRK  
SIM  
IRQ  
• 4 channels  
• Fast, easy conversion from analog inputs  
like temperature, pressure and fluid levels  
to digital values for CPU processing  
• Single conversion in 17 µsec  
PORT B  
8
TWO PROGRAMMABLE 16-BIT TIMER CHANNELS  
• 125 nsec resolution at 8 MHz bus  
• Each channel independently programmable  
for input capture, output compare or  
unbuffered PWM  
• Free-running counter or modulo up-counter  
• Pairing timer channels provides a buffered  
PWM function  
TIM  
SCI  
COP  
LVI  
SERIAL COMMUNICATIONS INTERFACE  
• UART asynchronous communications  
system  
• Flexible baud rate generator  
• Asynchronous communication between the  
MCU and a terminal, computer or a  
network of microcontrollers  
ICG  
TBM  
• Double buffered transmit and receive  
• Optional hardware parity checking and  
generation  

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