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KM68B261A PDF预览

KM68B261A

更新时间: 2024-02-02 00:24:49
品牌 Logo 应用领域
三星 - SAMSUNG /
页数 文件大小 规格书
7页 65K
描述
32K x 8 Bit High-Speed BiCMOS Static RAM

KM68B261A 数据手册

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KM68B261A  
BiCMOS SRAM  
32K x 8 Bit High-Speed BiCMOS Static RAM  
FEATURES  
GENERAL DESCRIPTION  
• Fast Access Time 6,7,8ns(Max.)  
• Low Power Dissipation  
The KM68B261A is a 262,144-bit high-speed Static  
Random Access Memory organized as 32,768 words by  
8 bits. The KM68B261A uses eight common input and  
output lines and has an output enable pin which  
operates faster than address access time at read cycle.  
The device is fabricated using Samsung`s advanced  
BiCMOS process and designed for high-speed system  
applications. It is particularly well suited for use in high-  
density high-speed system applications. The  
KM68B261A is packaged in a 300 mil 32-pin plastic  
SOJ.  
Standby (TTL) : 110 mA(Max.)  
(CMOS) : 20 mA(Max.)  
Operating Current : 170 mA(f=100MHz)  
• Single 5V ± 5% Power Supply  
• TTL Compatible Inputs and Outputs  
• Fully Static Operation  
- No Clock or Refresh required  
• Three State Outputs  
CenterPower/GroundPinConfiguration  
• Standard Pin Configuration  
KM68B261AJ:32-SOJ-300  
PIN CONFIGURATION(TOP VIEW)  
FUNCTIONAL BLOCK DIAGRAM  
A0  
A1  
1
2
3
4
5
6
7
8
9
32 N.C  
31 A14  
30 A13  
29 A12  
28 /OE  
27 I/O8  
26 I/O7  
25 Vss  
24 Vcc  
23 I/O6  
22 I/O5  
21 A11  
20 A10  
19 A9  
Pre-Charge Circuit  
A2  
A0  
A1  
A3  
/CS  
I/O1  
I/O2  
Vcc  
Vss  
A2  
MEMORY ARRAY  
128 Rows  
256x8 Columns  
A3  
A4  
SOJ  
I/O3 10  
I/O4 11  
/WE 12  
A4 13  
A5 14  
A6 15  
A7 16  
A5  
A6  
I/O Circuit  
Column Select  
Data  
Cont.  
I/O1-I/O8  
18 A8  
17 N.C  
A7 A8 A9 A10 A11 A12 A13 A14  
PIN DESCRIPTION  
Pin Name  
Pin Function  
/CS  
A0-A14  
/WE  
Address Inputs  
WriteEnable  
/WE  
/OE  
/CS  
ChipSelect  
/OE  
OutputEnable  
Data Inputs/Outputs  
Power(5V)  
I/O1-I/O8  
Vcc  
Vss  
Ground  
N.C  
NoConnection  
1
Rev 2.0  
October-1994  

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