Datasheet > KM48C514DLJ-5

KM48C514DLJ-5

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
三星 - SAMSUNG		动态存储器光电二极管
页数	文件大小	规格书
21页	412K
描述
EDO DRAM, 512KX8, 50ns, CMOS, PDSO28, 0.400 INCH, SOJ-28

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中文翻译

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数据手册

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KM48C514DLJ-5 数据手册

KM48C514D, KM48V514D

CMOS DRAM

512K x 8Bit CMOS Dynamic RAM with Extended Data Out

DESCRIPTION

This is a family of 524,288 x 8 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random access

of memory cells within the same row. Power supply voltage(+5.0V or +3.3V), Access time(-5,-6,-7), power consumption(Normal or Low

power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only

refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 512Kx8 EDO Mode DRAM

family is fabricated using Samsung¢s advanced CMOS process to realize high band-width, low power consumption and high reliability.

It may be used as main memory unit for microcomputer, personal computer and portable machines.

• Extended Data Out Mode operation

• Byte Read/Write operation

FEATURES

•

CAS-before-RAS refresh capability

• Part Identification

RAS-only and Hidden refresh capability

- KM48C514D/DL (5V, 1K Ref.)

- KM48V514D/DL (3.3V, 1K Ref.)

• Self-refresh capability (L-ver only)

• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs

• Early Write or output enable controlled write

• Active Power Dissipation

•

JEDEC Standard pinout

Unit : mW

5V (1K Ref.)

• Available in 28-pin SOJ 400mil & TSOP(II) 400mil

packages

Speed

-5

3.3V (1K Ref.)

470

385

360

• Dual +5V±10% power supply(5V product)

• Dual +3.3V±0.3V power supply(3.3V product)

-6

255

235

-7

• Refresh Cycles

FUNCTIONAL BLOCK DIAGRAM

Part

VCC

Refresh

cycle

Refresh period

NO.

Normal

L-ver

RAS

CAS

Vcc

Vss

Control

Clocks

C514D

VBB Generator

16ms

128ms

V514D 3.3V

Data in

Buffer

Row Decoder

Refresh Timer

Refresh Control

• Performance Range

Speed

-5

Remark

5V Only

5V/3.3V

tRAC

tCAC

tRC

tHPC

DQ0

DQ7

Memory Array

524,288 x8

Cells

50ns 15ns

84ns 20ns

Refresh Counter

Row Address Buffer

Col. Address Buffer

-6

60ns 15ns 104ns 25ns

70ns 20ns 124ns 30ns

-7

A0 - A9

A0 - A8

Data out

Buffer

Column Decoder

SAMSUNG ELECTRONICS CO., LTD. reserves the right to

change products and specifications without notice.

12 3 4 5 6 7...21

中文翻译

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与KM48C514DLJ-5相关器件

型号	品牌	获取价格	描述	数据表
KM48C514DLJ-6	SAMSUNG	获取价格	EDO DRAM, 512KX8, 60ns, CMOS, PDSO28, 0.400 INCH, SOJ-28
KM48C514DLT-6	SAMSUNG	获取价格	EDO DRAM, 512KX8, 60ns, CMOS, PDSO28, 0.400 INCH, TSOP2-28
KM48C514DT-L7	SAMSUNG	获取价格	EDO DRAM, 512KX8, 70ns, CMOS, PDSO28, 0.400 INCH, PLASTIC, TSOP2-28
KM48C8000AK-5	SAMSUNG	获取价格	Fast Page DRAM, 8MX8, 50ns, CMOS, PDSO32, 0.400 INCH, SOJ-32
KM48C8000AK-6	SAMSUNG	获取价格	Fast Page DRAM, 8MX8, 60ns, CMOS, PDSO32, 0.400 INCH, SOJ-32
KM48C8000BK-45	SAMSUNG	获取价格	Fast Page DRAM, 8MX8, 45ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, SOJ-32
KM48C8000BK-5	SAMSUNG	获取价格	Fast Page DRAM, 8MX8, 50ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, SOJ-32
KM48C8000BK-6	SAMSUNG	获取价格	Fast Page DRAM, 8MX8, 60ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, SOJ-32
KM48C8000BS-45	SAMSUNG	获取价格	Fast Page DRAM, 8MX8, 45ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, TSOP2-32
KM48C8000BS-5	SAMSUNG	获取价格	Fast Page DRAM, 8MX8, 50ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, TSOP2-32

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