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KL5KUSB200 PDF预览

KL5KUSB200

更新时间: 2024-10-29 22:41:03
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其他 - ETC /
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2页 29K
描述
USB2.0 Transceiver

KL5KUSB200 数据手册

 浏览型号KL5KUSB200的Datasheet PDF文件第2页 
KL5KUSB200  
USB2.0 Transceiver  
General Description  
The Kawasaki USB 2.0 Compliant Transceiver is the interface between the high performance USB serial  
bus and the 16-bit SIE bus. The high-speed analog interface and the digital serial bit processing feature  
of the USB 2.0 transceiver enables a highly integrated USB 2.0 device. The transceiver is controlled by  
input signals from the SIE bus which is synchronized with the 30MHz clock output. The Kawasaki  
Transceiver also provides output signals to monitor the USB bus status. The Kawasaki Transceiver, SIE,  
and logic design are combined to create Kawasaki's USB chip solutions for peripheral devices or can be  
used as IP with our ASIC technology.  
Features  
·
·
USB 2.0 compliant transceiver  
UTMI based design (USB 2.0 Transceiver Macro  
cell Interface)  
·
·
·
·
·
·
Status signals for monitoring USB bus  
Optional CRC verification/generation logic  
Mode bit expansion for device test  
16 bit Bi-directional SIE bus  
TX data packet abort  
·
·
·
·
·
Generates 48MHz to 480MHz input  
Full Speed / High Speed capabilities  
Supports “Chirp” for High Speed recognition  
Support Reset and Suspend  
ASIC IP supports High speed SIE with  
ASIC IP  
80 pin LQFP package (12 mm2)  
Operational mode selection  
·
Block Diagram  
USB Bus  
SIE Bus  
Control Signals  
HS  
DLL  
HSDP  
EBUF  
High Speed  
Front end  
Status  
Shared  
Logic  
SIE  
Interface  
HSDM  
CKOUT  
SIE_Data  
RPU_ENA  
FSDP  
DPLL  
Full Speed  
Front end  
FSDM  
Clock  
External  
48MHz Clk  
Generator  
US: Kawasaki LSI , 2570 N. 1st Street, San Jose, CA 95131,Tel:(408) 570-0555, Fax(408) 570-0567, www.klsi.com  
Japan: Kawasaki Steel Corp, Makuhari Techno-Garden B5, Nakase 1-3, Mihama-ku, Chiba, 261-8501Tel:(043)296-3283, Fax:(043)296-3285, email:usb-info@lsidv.kawasaki-steel.co.jp  
Ver. 2.2  
1

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