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KK4520BD PDF预览

KK4520BD

更新时间: 2024-11-09 03:48:07
品牌 Logo 应用领域
可天士 - KODENSHI 计数器高压
页数 文件大小 规格书
6页 421K
描述
Dual Up-Counter High-Voltage Silicon-Gate CMOS

KK4520BD 数据手册

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TECHNICAL DATA  
KK4520B  
Dual Up-Counter  
High-Voltage Silicon-Gate CMOS  
The KK4520B Dual Binary Up-Counter consists two identical,  
internally synchronous 4-stage counters. The counter stages are D-type  
flip-flops having interchangeable CLOCK and ENABLE lines for  
incrementing on either the positive-going or negative-going transition. For  
single-unit operation the ENABLE input is maintained high and the  
counter advances on each positive-going transition of the CLOCK. The  
counters are cleared by high levels on their RESET lines.  
The counter can be cascaded in the ripple mode by connecting Q4 to  
the enable input of the subsequent counter while the CLOCK input of the  
latter is held low.  
ORDERING INFORMATION  
KK4520BN Plastic  
KK4520BD SOIC  
TA = -55° to 125° C for all packages  
Operating Voltage Range: 3.0 to 18 V  
Maximum input current of 1 µA at 18 V over full package-temperature  
range; 100 nA at 18 V and 25°C  
Noise margin (over full package temperature range):  
1.0 V min @ 5.0 V supply  
2.0 V min @ 10.0 V supply  
2.5 V min @ 15.0 V supply  
PIN ASSIGNMENT  
LOGIC DIAGRAM  
FUNCTION TABLE  
Inputs  
CLOCK ENABLE RESET  
Outputs  
Mode  
H
X
L
L
L
L
L
L
L
H
Increment Counter  
Increment Counter  
No Change  
L
PIN 16=VCC  
PIN 8= GND  
X
No Change  
No Change  
H
X
No Change  
X
Q1 thru Q4=L  
X = don’t care  
1

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