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KAD5610P-12Q72 PDF预览

KAD5610P-12Q72

更新时间: 2024-02-02 18:08:08
品牌 Logo 应用领域
英特矽尔 - INTERSIL 转换器
页数 文件大小 规格书
27页 579K
描述
Dual 10-Bit, 250/210/170/125MSPS A/D Converter

KAD5610P-12Q72 技术参数

生命周期:Unknown零件包装代码:QFN
包装说明:HVQCCN, LCC72,.39SQ,20针数:72
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:17 weeks风险等级:5.83
最大模拟输入电压:1.54 V最小模拟输入电压:-1.54 V
最长转换时间:0.008 µs转换器类型:ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码:S-PQCC-N72JESD-609代码:e4
长度:10 mm最大线性误差 (EL):0.0732%
湿度敏感等级:3模拟输入通道数量:2
位数:10功能数量:1
端子数量:72最高工作温度:85 °C
最低工作温度:-40 °C输出位码:OFFSET BINARY, 2'S COMPLEMENT BINARY, GRAY CODE
输出格式:PARALLEL, WORD封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC72,.39SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:1.8 V
认证状态:Not Qualified采样速率:125 MHz
采样并保持/跟踪并保持:SAMPLE座面最大高度:0.9 mm
子类别:Analog to Digital Converters标称供电电压:1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10 mm

KAD5610P-12Q72 数据手册

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KAD5610P  
®
Data Sheet  
January 30, 2009  
FN6810.1  
Dual 10-Bit, 250/210/170/125MSPS A/D  
Converter  
Features  
• Programmable Gain, Offset and Skew control  
• 1.3GHz Analog Input Bandwidth  
• 60fs Clock Jitter  
The KAD5610P is a family of low-power, high-performance,  
dual-channel 10-bit, analog-to-digital converters. Designed  
with Intersil’s proprietary FemtoCharge™ technology on a  
standard CMOS process, the family supports sampling rates  
of up to 250MSPS. The KAD5610P-25 is the fastest member  
of this pin-compatible family, which also features sample  
rates of 210MSPS (KAD5610P-21), 170MSPS  
• Over-Range Indicator  
• Selectable Clock Divider: ÷1, ÷2 or ÷4  
• Clock Phase Selection  
(KAD5610P-17) and 125MSPS (KAD5610P-12).  
• Nap and Sleep Modes  
A serial peripheral interface (SPI) port allows for extensive  
configurability, as well as fine control of gain, skew and offset  
matching between the two converter cores.  
• Two’s Complement, Gray Code or Binary Data Format  
• DDR LVDS-Compatible or LVCMOS Outputs  
• Programmable Built-in Test Patterns  
• Single-Supply 1.8V Operation  
Digital output data is presented in selectable LVDS or CMOS  
formats. The KAD5610P is available in a 72-contact QFN  
package with an exposed paddle. Performance is specified  
over the full industrial temperature range (-40°C to +85°C).  
Applications  
• Power Amplifier Linearization  
• Radar and Satellite Antenna Array Processing  
• Broadband Communications  
CLKP  
CLKN  
CLKOUTP  
CLKOUTN  
• High-Performance Data Acquisition  
• Communications Test Equipment  
• WiMAX and Microwave Receivers  
CLOCK  
GENERATION  
Key Specifications  
• SNR = 60.7dBFS for f = 105MHz (-1dBFS)  
IN  
AINP  
AINN  
10-BIT  
250MSPS  
ADC  
D[9:0]P  
D[9:0]N  
SHA  
• SFDR = 86.1dBc for f = 105MHz (-1dBFS)  
IN  
VREF  
ORP  
ORN  
DIGITAL  
ERROR  
CORRECTION  
VCM  
• Power consumption  
- 411mW @ 250MSPS  
- 327mW @ 125MSPS  
OUTFMT  
BINP  
BINN  
10-BIT  
250MSPS  
ADC  
SHA  
OUTMODE  
VREF  
1.25V  
Pin-Compatible Family  
+
SPI  
CONTROL  
SPEED  
(MSPS)  
MODEL  
KAD5612P-25  
KAD5612P-21  
KAD5612P-17  
KAD5612P-12  
KAD5610P-25  
KAD5610P-21  
KAD5610P-17  
KAD5610P-12  
RESOLUTION  
12  
12  
12  
12  
10  
10  
10  
10  
250  
210  
170  
125  
250  
210  
170  
125  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
FemtoCharge is a trademark of Kenet Inc. Copyright Intersil Americas Inc. 2008. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
1

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