Datasheet > KAD5612P-17Q72

KAD5612P-17Q72

更新时间： 2024-09-23 05:40:39

品牌	Logo	应用领域
英特矽尔 - INTERSIL		转换器
页数	文件大小	规格书
27页	451K
描述
Dual 12-Bit, 250/210/170/125MSPS A/D Converter

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KAD5612P-17Q72 数据手册

KAD5612P

Data Sheet

December 5, 2008

FN6803.0

Dual 12-Bit, 250/210/170/125MSPS A/D

Converter

Features

• Programmable Gain, Offset and Skew control

• 1.3GHz Analog Input Bandwidth

• 60fs Clock Jitter

The KAD5612P is a family of low-power, high-performance,

dual-channel 12-bit, analog-to-digital converters. Designed

with FemtoCharge™ technology on a standard CMOS

process, the family supports sampling rates of up to

250MSPS. The KAD5612P-25 is the fastest member of this

pin-compatible family, which also features sample rates of

210MSPS (KAD5612P-21), 170MSPS (KAD5612P-17) and

125MSPS (KAD5612P-12).

• Over-Range Indicator

• Selectable Clock Divider: ÷1, ÷2 or ÷4

• Clock Phase Selection

• Nap and Sleep Modes

• Two’s Complement, Gray Code or Binary Data Format

• DDR LVDS-Compatible or LVCMOS Outputs

• Programmable Built-in Test Patterns

• Single-Supply 1.8V Operation

• Pb-Free (RoHS Compliant)

A serial peripheral interface (SPI) port allows for extensive

configurability, as well as fine control of gain, skew and offset

matching between the two converter cores.

Digital output data is presented in selectable LVDS or CMOS

formats. The KAD5612P is available in a 72-contact QFN

package with an exposed paddle. Performance is specified

over the full industrial temperature range (-40°C to +85°C).

Applications

• Power Amplifier Linearization

• Radar and Satellite Antenna Array Processing

• Broadband Communications

• High-Performance Data Acquisition

• Communications Test Equipment

• WiMAX and Microwave Receivers

CLKP

CLKN

CLKOUTP

CLKOUTN

Clock

Generation

Key Specifications

AINP

AINN

12-bit

250MSPS

ADC

• SNR = 65.1dBFS for f = 124MHz (-1dBFS)

D[11:0]P

D[11:0]N

SHA

• SFDR = 80dBc for f = 124MHz (-1dBFS)

VREF

ORP

ORN

• Power consumption

Digital

Error

Correction

VCM

- 405mW @ 250MSPS

- 324mW @ 125MSPS

OUTFMT

BINP

BINN

12-bit

250MSPS

ADC

SHA

OUTMODE

Pin-Compatible Family

VREF

1.25V

–

SPEED

(MSPS)

SPI

Control

MODEL

KAD5612P-25

KAD5612P-21

KAD5612P-17

KAD5612P-12

KAD5610P-25

KAD5610P-21

KAD5610P-17

KAD5610P-12

RESOLUTION

250

210

170

125

250

210

170

125

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

12 3 4 5 6 7...27

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与KAD5612P-17Q72相关器件

型号	品牌	获取价格	描述	数据表
KAD5612P-21	INTERSIL	获取价格	Providing high-performance solutions for every link in the signal chain
KAD5612P-21	RENESAS	获取价格	12-Bit, 210MSPS Dual-Channel ADC with LVDS/LVCMOS Outputs
KAD5612P-21Q72	INTERSIL	获取价格	Dual 12-Bit, 250/210/170/125MSPS A/D Converter
KAD5612P-25	INTERSIL	获取价格	Providing high-performance solutions for every link in the signal chain
KAD5612P-25	RENESAS	获取价格	12-Bit, 250MSPS Dual-Channel ADC with LVDS/LVCMOS Outputs
KAD5612P-25Q72	INTERSIL	获取价格	Dual 12-Bit, 250/210/170/125MSPS A/D Converter
KAD7000	SAMSUNG	获取价格	ADC, Dual-Slope, 1 Func, 1 Channel, 10 X 10 MM, QFP-48
KAD7000B	SAMSUNG	获取价格	ADC, Dual-Slope, 1 Func, 1 Channel, CMOS, PQFP48, 10 X 10 MM, QFP-48
KAD7001	SAMSUNG	获取价格	ADC, Proprietary Method, 1 Func, 1 Channel, PQFP80, 14 X 20 MM, QFP-80
KAD7001CQ	SAMSUNG	获取价格	ADC, Dual-Slope, 1 Func, 1 Channel, CMOS, PQFP80, 14 X 20 MM, QFP-80

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