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KAD5510P-21 PDF预览

KAD5510P-21

更新时间: 2023-12-20 18:44:15
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
31页 1595K
描述
Low Power 10-Bit, 210MSPS ADC

KAD5510P-21 数据手册

 浏览型号KAD5510P-21的Datasheet PDF文件第3页浏览型号KAD5510P-21的Datasheet PDF文件第4页浏览型号KAD5510P-21的Datasheet PDF文件第5页浏览型号KAD5510P-21的Datasheet PDF文件第7页浏览型号KAD5510P-21的Datasheet PDF文件第8页浏览型号KAD5510P-21的Datasheet PDF文件第9页 
KAD5510P  
Absolute Maximum Ratings  
Thermal Information  
AVDD to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.4V to 2.1V  
OVDD to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.4V to 2.1V  
AVSS to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V  
Analog Inputs to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V  
Clock Inputs to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V  
Logic Input to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V  
Logic Inputs to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V  
Thermal Resistance (Typical)  
48 Ld QFN (Notes 3, 4) . . . . . . . . . . . . . . . .  
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C  
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C  
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493  
JA (°C/W)  
25  
JC (°C/W)  
0.5  
Recommended Operating Conditions  
AVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.8V  
OVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.8V  
Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C  
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product  
reliability and result in failures not covered by warranty.  
NOTES:  
3. is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech  
JA  
Brief TB379.  
4. For , the “case temp” location is the center of the exposed metal pad on the package underside.  
JC  
Electrical Specifications All specifications apply under the following conditions unless otherwise noted: AVDD = 1.8V, OVDD = 1.8V,  
T
= -40°C to +85°C (typical specifications at +25°C), A = -1dBFS, f  
= Maximum Conversion Rate (per speed grade). Boldface limits apply  
SAMPLE  
A
IN  
across the operating temperature range, -40°C to +85°C.  
KAD5510P-25  
KAD5510P-21  
KAD5510P-17  
KAD5510P-12  
TYP MAX  
TEST  
CONDITIONS  
PARAMETER  
DC SPECIFICATIONS  
Analog Input  
SYMBOL  
MIN TYP MAX MIN  
TYP MAX MIN  
TYP MAX MIN  
UNIT  
Full-Scale Analog  
Input Range  
V
Differential  
1.40 1.47 1.54 1.40 1.47 1.54 1.40 1.47 1.54 1.40 1.47 1.54  
V
P-P  
FS  
Input Resistance  
Input Capacitance  
R
C
Differential  
Differential  
1000  
1.8  
1000  
1.8  
1000  
1.8  
1000  
1.8  
Ω
IN  
pF  
IN  
Full Scale Range  
Temp. Drift  
A
Full  
temperature  
90  
90  
90  
90  
ppm/°C  
VTC  
Input Offset Voltage  
Gain Error  
V
-10  
±2  
10  
-10  
±2  
10  
-10  
±2  
10  
-10  
±2  
10  
mV  
%
OS  
E
±0.6  
±0.6  
±0.6  
±0.6  
G
Common-Mode  
Output Voltage  
V
435 535  
635  
435 535 635 435  
535 635 435 535 635  
mV  
CM  
Common-Mode  
Input Current (per  
pin)  
I
2.5  
2.5  
2.5  
2.5  
µA/  
MSPS  
CM  
Clock Inputs  
Input  
Common-Mode  
Voltage  
0.9  
1.8  
0.9  
1.8  
0.9  
1.8  
0.9  
1.8  
V
V
CLKP,CLKN Input  
Swing  
Power Requirements  
1.8V Analog Supply  
Voltage  
AVDD  
OVDD  
1.7  
1.7  
1.8  
1.8  
1.9  
1.9  
1.7  
1.7  
1.8  
1.8  
1.9  
1.9  
1.7  
1.7  
1.8  
1.8  
1.9  
1.9  
1.7  
1.7  
1.8  
1.8  
1.9  
1.9  
V
V
1.8V Digital Supply  
Voltage  
FN7693 Rev 3.00  
February 8, 2016  
Page 6 of 31  

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