PRELIMPreliminaryPPPPPPPPPINARY
CMOS SRAM
K6R4016V1D
PIN CONFIGURATION (Top View)
1
2
3
4
5
6
A0
A1
1
2
3
4
5
6
7
8
9
44 A17
43 A16
42 A15
41 OE
A
B
C
D
E
F
LB
OE
UB
A0
A3
A1
A4
A2
N.C
I/O9
I/O10
Vcc
A2
A3
I/O1
CS
A4
40 UB
CS
I/O1
I/O2
I/O3
39 LB
I/O2
Vss
I/O3
I/O4
I/O5
I/O6
N.C
A8
A5
A6
I/O11
I/O12
I/O13
I/O14
WE
38 I/O16
37 I/O15
36 I/O14
35 I/O13
34 Vss
33 Vcc
32 I/O12
31 I/O11
30 I/O10
29 I/O9
28 N.C
27 A14
26 A13
25 A12
24 A11
23 A10
A17
N.C
A14
A12
A9
A7
I/O4 10
Vcc 11
Vss 12
I/O5 13
I/O6 14
I/O7 15
I/O8 16
WE 17
A5 18
SOJ/
TSOP2
Vcc
I/O7
I/O8
N.C
A16
A15
A13
A10
Vss
I/O15
I/O16
N.C
G
H
A11
A6 19
A7 20
48-TBGA
A8 21
A9 22
PIN FUNCTION
Pin Name
A0 - A17
WE
Pin Function
Address Inputs
Write Enable
Chip Select
CS
OE
Output Enable
LB
Lower-byte Control(I/O1~I/O8)
Upper-byte Control(I/O9~I/O16)
Data Inputs/Outputs
Power(+3.3V)
UB
I/O1 ~ I/O16
VCC
VSS
Ground
N.C
No Connection
ABSOLUTE MAXIMUM RATINGS*
Parameter
Symbol
VIN, VOUT
VCC
Rating
Unit
Voltage on Any Pin Relative to VSS
Voltage on VCC Supply Relative to VSS
Power Dissipation
-0.5 to 4.6
-0.5 to 4.6
1.0
V
V
PD
W
°C
°C
°C
Storage Temperature
TSTG
TA
-65 to 150
0 to 70
Operating Temperature
Commercial
Industrial
TA
-40 to 85
* Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Rev 4.0
Mar. 2004
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