Datasheet > K6R4016V1D-UP10T

K6R4016V1D-UP10T

更新时间： 2023-01-02 23:23:29

品牌	Logo	应用领域
三星 - SAMSUNG		静态存储器光电二极管
页数	文件大小	规格书
12页	225K
描述
Standard SRAM, 256KX16, 10ns, CMOS, PDSO44

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数据手册

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K6R4016V1D-UP10T 数据手册

PRELIMPreliminaryPPPPPPPPPINARY

CMOS SRAM

K6R4016V1D

AC CHARACTERISTICS(TA=0 to 70°C, VCC=3.3±0.3V, unless otherwise noted.)

TEST CONDITIONS*

Parameter

Value

Input Pulse Levels

0V to 3V

3ns

Input Rise and Fall Times

Input and Output timing Reference Levels

Output Loads

1.5V

See below

* The above test conditions are also applied at industrial temperature range.

Output Loads(B)

for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ

Output Loads(A)

+3.3V

RL = 50Ω

DOUT

319Ω

VL = 1.5V

DOUT

30pF*

ZO = 50Ω

353Ω

5pF*

* Capacitive Load consists of all components of the

test environment.

* Including Scope and Jig Capacitance

READ CYCLE*

K6R4016V1D-08

K6R4016V1D-10

Min Max

Parameter

Symbol

Unit

Min

Max

Read Cycle Time

tRC

tAA

Address Access Time

Chip Select to Output

tCO

tOE

tBA

Output Enable to Valid Output

UB, LB Access Time

Chip Enable to Low-Z Output

Output Enable to Low-Z Output

UB, LB Enable to Low-Z Output

Chip Disable to High-Z Output

Output Disable to High-Z Output

UB, LB Disable to High-Z Output

Output Hold from Address Change

Chip Selection to Power Up Time

Chip Selection to Power DownTime

tLZ

tOLZ

tBLZ

tHZ

tOHZ

tBHZ

tOH

tPU

tPD

* The above parameters are also guaranteed at industrial temperature range.

Rev 4.0

Mar. 2004

- 6 -

1...3 4 567 8 9...12

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