K4E661611D,K4E641611D
CMOS DRAM
4M x 16bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 4,194,304 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-50 or -60) are optional features of this
family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. This 4Mx16 EDO Mode DRAM
family is fabricated using Samsung¢s advanced CMOS process to realize high band-width, low power consumption and high reliability.
FEATURES
• Extended Data Out Mode operation
• Part Identification
• 2 CAS Byte/Word Read/Write operation
- K4E661611D-TC(5.0V, 8K Ref.)
- K4E641611D-TC(5.0V, 4K Ref.)
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Fast parallel test mode capability
• TTL(5.0V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• ActivePowerDissipation
Unit : mW
4K
• Available in Plastic TSOP(II) package
• +5.0V±10% power supply
Speed
-50
8K
495
440
660
-60
605
• Refresh Cycles
Part
NO.
Refresh
cycle
Refresh time
FUNCTIONAL BLOCK DIAGRAM
Normal
K4E661611D*
K4E641611D
8K
4K
64ms
RAS
UCAS
LCAS
W
Vcc
Vss
Control
Clocks
VBB Generator
* Access mode & RAS only refresh mode
: 8K cycle/64ms
Lower
Data in
Buffer
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms
DQ0
to
DQ7
Row Decoder
Refresh Timer
Lower
Data out
Buffer
Refresh Control
Memory Array
• Performance Range
OE
4,194,304 x 16
Cells
Refresh Counter
Row Address Buffer
Col. Address Buffer
Upper
Data in
Buffer
Speed
tRAC
50ns
60ns
tCAC
13ns
15ns
tRC
tHPC
20ns
25ns
A0~A12
(A0~A11)*1
DQ8
to
DQ15
-50
-60
84ns
104ns
Upper
Data out
Buffer
A0~A8
(A0~A9)*1
Column Decoder
Note) *1 : 4K Refresh
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.