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K4E641612B-TC450 PDF预览

K4E641612B-TC450

更新时间: 2024-02-23 12:18:14
品牌 Logo 应用领域
三星 - SAMSUNG 动态存储器光电二极管内存集成电路
页数 文件大小 规格书
36页 885K
描述
EDO DRAM, 4MX16, 45ns, CMOS, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50

K4E641612B-TC450 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:TSOP2,
针数:50Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.02
风险等级:5.69Is Samacsys:N
访问模式:FAST PAGE WITH EDO最长访问时间:45 ns
其他特性:RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESHJESD-30 代码:R-PDSO-G50
长度:20.95 mm内存密度:67108864 bit
内存集成电路类型:EDO DRAM内存宽度:16
功能数量:1端口数量:1
端子数量:50字数:4194304 words
字数代码:4000000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:4MX16封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE峰值回流温度(摄氏度):240
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:10.16 mmBase Number Matches:1

K4E641612B-TC450 数据手册

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K4E661612B,K4E641612B  
CMOS DRAM  
4M x 16bit CMOS Dynamic RAM with Extended Data Out  
DESCRIPTION  
This is a family of 4,194,304 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random  
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), power consumption(Nor-  
mal or Low power) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden  
refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 4Mx16 EDO Mode DRAM family is fabricated  
using Samsung¢s advanced CMOS process to realize high band-width, low power consumption and high reliability.  
• Extended Data Out Mode operation  
FEATURES  
• Part Identification  
• 2 CAS Byte/Word Read/Write operation  
• CAS-before-RAS refresh capability  
• RAS-only and Hidden refresh capability  
• Fast parallel test mode capability  
• Self-refresh capability (L-ver only)  
• LVTTL(3.3V) compatible inputs and outputs  
• Early Write or output enable controlled write  
• JEDEC Standard pinout  
- K4E661612B-TC/L(3.3V, 8K Ref., TSOP)  
- K4E641612B-TC/L(3.3V, 4K Ref., TSOP)  
Active Power Dissipation  
Unit : mW  
4K  
Speed  
-45  
8K  
• Available in Plastic TSOP(II) packages  
• +3.3V±0.3V power supply  
360  
324  
288  
468  
432  
396  
-50  
-60  
Refresh Cycles  
FUNCTIONAL BLOCK DIAGRAM  
Part  
NO.  
Refresh  
cycle  
Refresh time  
Normal  
L-ver  
RAS  
UCAS  
LCAS  
W
Vcc  
Vss  
Control  
K4E661612B*  
K4E641612B  
8K  
4K  
64ms  
128ms  
Clocks  
VBB Generator  
Lower  
Data in  
Buffer  
* Access mode & RAS only refresh mode  
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)  
CAS-before-RAS & Hidden refresh mode  
DQ0  
to  
DQ7  
Row Decoder  
Refresh Timer  
Lower  
Data out  
Buffer  
Refresh Control  
Memory Array  
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)  
OE  
4,194,304 x 16  
Cells  
Refresh Counter  
Row Address Buffer  
Col. Address Buffer  
Upper  
Data in  
Buffer  
Performance Range  
DQ8  
to  
DQ15  
Speed  
tRAC  
50ns  
50ns  
60ns  
tCAC  
12ns  
13ns  
15ns  
tRC  
74ns  
84ns  
104ns  
tHPC  
17ns  
20ns  
25ns  
A0~A12  
(A0~A11)*1  
Upper  
Data out  
Buffer  
-45  
-50  
-60  
A0~A8  
(A0~A9)*1  
Column Decoder  
Note) *1 : 4K Refresh  
SAMSUNG ELECTRONICS CO., LTD. reserves the right to  
change products and specifications without notice.  

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