Datasheet > K4E641612C

K4E641612C

更新时间： 2024-02-21 10:45:07

品牌	Logo	应用领域
三星 - SAMSUNG		存储
页数	文件大小	规格书
36页	885K
描述
4M x 16bit CMOS Dynamic RAM with Extended Data Out

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中文翻译

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K4E641612C 数据手册

K4E661612C,K4E641612C

CMOS DRAM

4M x 16bit CMOS Dynamic RAM with Extended Data Out

DESCRIPTION

This is a family of 4,194,304 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random

access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), power consumption(Nor-

mal or Low power) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden

refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 4Mx16 EDO Mode DRAM family is fabricated

using Samsung¢s advanced CMOS process to realize high band-width, low power consumption and high reliability.

FEATURES

• Extended Data Out Mode operation

• 2 CAS Byte/Word Read/Write operation

• CAS-before-RAS refresh capability

• RAS-only and Hidden refresh capability

• Fast parallel test mode capability

• Self-refresh capability (L-ver only)

• LVTTL(3.3V) compatible inputs and outputs

• Early Write or output enable controlled write

• JEDEC Standard pinout

• Part Identification

- K4E661612C-TC/L(3.3V, 8K Ref.)

- K4E641612C-TC/L(3.3V, 4K Ref.)

• ActivePowerDissipation

Unit : mW

Speed

-45

• Available in Plastic TSOP(II) packages

• +3.3V±0.3V power supply

324

288

252

468

-50

432

-60

396

• Refresh Cycles

FUNCTIONAL BLOCK DIAGRAM

Part

NO.

Refresh

cycle

Refresh time

Normal

L-ver

RAS

UCAS

LCAS

K4E661612C*

K4E641612C

Vcc

Vss

64ms

128ms

Control

Clocks

VBB Generator

* Access mode & RAS only refresh mode

: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)

CAS-before-RAS & Hidden refresh mode

Lower

Data in

Buffer

DQ0

Row Decoder

Refresh Timer

DQ7

Lower

Data out

Buffer

: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)

Refresh Control

Memory Array

4,194,304 x 16

Cells

Refresh Counter

Upper

Data in

Buffer

• Performance Range

DQ8

DQ15

Speed

Row Address Buffer

Col. Address Buffer

tRAC

45ns

50ns

60ns

tCAC

12ns

13ns

15ns

tRC

74ns

84ns

104ns

tHPC

17ns

20ns

25ns

A0~A12

(A0~A11)*1

Upper

Data out

Buffer

-45

-50

-60

A0~A8

(A0~A9)*1

Column Decoder

Note) *1 : 4K Refresh

SAMSUNG ELECTRONICS CO., LTD. reserves the right to

change products and specifications without notice.

12 3 4 5 6 7...36

中文翻译

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与K4E641612C相关器件

型号	品牌	获取价格	描述	数据表
K4E641612C-45	SAMSUNG	获取价格	4M x 16bit CMOS Dynamic RAM with Extended Data Out
K4E641612C-50	SAMSUNG	获取价格	4M x 16bit CMOS Dynamic RAM with Extended Data Out
K4E641612C-60	SAMSUNG	获取价格	4M x 16bit CMOS Dynamic RAM with Extended Data Out
K4E641612C-L	SAMSUNG	获取价格	4M x 16bit CMOS Dynamic RAM with Extended Data Out
K4E641612C-T	SAMSUNG	获取价格	4M x 16bit CMOS Dynamic RAM with Extended Data Out
K4E641612C-T45	SAMSUNG	获取价格	4M x 16bit CMOS Dynamic RAM with Extended Data Out
K4E641612C-T50	SAMSUNG	获取价格	4M x 16bit CMOS Dynamic RAM with Extended Data Out
K4E641612C-T60	SAMSUNG	获取价格	4M x 16bit CMOS Dynamic RAM with Extended Data Out
K4E641612C-TC	SAMSUNG	获取价格	4M x 16bit CMOS Dynamic RAM with Extended Data Out
K4E641612C-TC45	SAMSUNG	获取价格	4M x 16bit CMOS Dynamic RAM with Extended Data Out

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