Datasheet > K4E641612B-L

K4E641612B-L

更新时间： 2022-11-27 15:21:23

品牌	Logo	应用领域
三星 - SAMSUNG		存储
页数	文件大小	规格书
36页	886K
描述
4M x 16bit CMOS Dynamic RAM with Extended Data Out

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K4E641612B-L 数据手册

K4E661612B,K4E641612B

CMOS DRAM

4M x 16bit CMOS Dynamic RAM with Extended Data Out

DESCRIPTION

This is a family of 4,194,304 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random

access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), power consumption(Nor-

mal or Low power) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden

refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 4Mx16 EDO Mode DRAM family is fabricated

using Samsung¢s advanced CMOS process to realize high band-width, low power consumption and high reliability.

• Extended Data Out Mode operation

FEATURES

• Part Identification

• 2 CAS Byte/Word Read/Write operation

• CAS-before-RAS refresh capability

• RAS-only and Hidden refresh capability

• Fast parallel test mode capability

• Self-refresh capability (L-ver only)

• LVTTL(3.3V) compatible inputs and outputs

• Early Write or output enable controlled write

• JEDEC Standard pinout

- K4E661612B-TC/L(3.3V, 8K Ref., TSOP)

- K4E641612B-TC/L(3.3V, 4K Ref., TSOP)

• Active Power Dissipation

Unit : mW

Speed

-45

• Available in Plastic TSOP(II) packages

• +3.3V±0.3V power supply

360

324

288

468

432

396

-50

-60

• Refresh Cycles

FUNCTIONAL BLOCK DIAGRAM

Part

NO.

Refresh

cycle

Refresh time

Normal

L-ver

RAS

UCAS

LCAS

Vcc

Vss

Control

K4E661612B*

K4E641612B

64ms

128ms

Clocks

VBB Generator

Lower

Data in

Buffer

* Access mode & RAS only refresh mode

: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)

CAS-before-RAS & Hidden refresh mode

DQ0

DQ7

Row Decoder

Refresh Timer

Lower

Data out

Buffer

Refresh Control

Memory Array

: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)

4,194,304 x 16

Cells

Refresh Counter

Row Address Buffer

Col. Address Buffer

Upper

Data in

Buffer

• Performance Range

DQ8

DQ15

Speed

tRAC

50ns

60ns

tCAC

12ns

13ns

15ns

tRC

74ns

84ns

104ns

tHPC

17ns

20ns

25ns

A0~A12

(A0~A11)*1

Upper

Data out

Buffer

-45

-50

-60

A0~A8

(A0~A9)*1

Column Decoder

Note) *1 : 4K Refresh

SAMSUNG ELECTRONICS CO., LTD. reserves the right to

change products and specifications without notice.

12 3 4 5 6 7...36

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与K4E641612B-L相关器件

型号	品牌	描述	获取价格	数据表
K4E641612B-TC	SAMSUNG	4M x 16bit CMOS Dynamic RAM with Extended Data Out	获取价格
K4E641612B-TC45	SAMSUNG	EDO DRAM, 4MX16, 45ns, CMOS, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50	获取价格
K4E641612B-TC450	SAMSUNG	EDO DRAM, 4MX16, 45ns, CMOS, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50	获取价格
K4E641612B-TC50	SAMSUNG	EDO DRAM, 4MX16, 50ns, CMOS, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50	获取价格
K4E641612B-TC500	SAMSUNG	EDO DRAM, 4MX16, 50ns, CMOS, PDSO50, 0.400 INCH, PLASTIC, TSOP2-50	获取价格
K4E641612B-TC50M0	SAMSUNG	EDO DRAM, 4MX16, 50ns, CMOS, PDSO50	获取价格