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JS28F128M29EWXX PDF预览

JS28F128M29EWXX

更新时间： 2024-02-16 03:15:15
品牌 Logo 应用领域
镁光 - MICRON /
页数 文件大小 规格书
87页 1118K
描述
Parallel NOR Flash Embedded Memory

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JS28F128M29EWXX 数据手册

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32Mb, 64Mb, 128Mb: 3V Embedded Parallel NOR Flash  
Features  
Parallel NOR Flash Embedded Memory  
JR28F032M29EWXX; PZ28F032M29EWXX; JS28F064M29EWXX  
PC28F064M29EWXX; JR28F064M29EWXX; PZ28F064M29EWXX  
JS28F128M29EWXX; PC28F128M29EWXX; RC28F128M29EWXX  
• VPP/WP# pin protection  
– VPPH voltage on VPP to accelerate programming  
Features  
• Supply voltage  
– VCC = 2.7–3.6V (program, erase, read)  
– VCCQ = 1.65–3.6V (I/O buffers)  
• Asynchronous random or page read  
– Page size: 8 words or 16 bytes  
performance  
– Protects highest/lowest block (H/L uniform) or  
top/bottom two blocks (T/B boot)  
• Software protection  
– Volatile protection  
– Nonvolatile protection  
– Page access: 25ns  
– Random access: 60ns (BGA); 70ns (TSOP)  
• Buffer program: 256-word MAX program buffer  
• Program time  
– Password protection  
– Password access  
• Extended memory block  
– 0.56µs per byte (1.8 MB/s TYP when using 256-  
word buffer size in buffer program without VPPH  
– 0.31µs per byte (3.2 MB/s TYP when using 256-  
– 128-word (256-byte) block for permanent secure  
identification  
– Program or lock implemented at the factory or by  
the customer  
• Low-power consumption: Standby mode  
• JESD47H-compliant  
– 100,000 minimum ERASE cycles per block  
– Data retention: 20 years (TYP)  
• 65nm single-bit cell process technology  
• Packages (JEDEC-standard)  
– 56-pin TSOP (128Mb, 64Mb)  
– 48-pin TSOP (64Mb, 32Mb)  
– 64-ball FBGA (128Mb, 64Mb)  
– 48-ball BGA (64Mb, 32Mb)  
• Green packages available  
– RoHS-compliant  
)
word buffer size in buffer program with VPPH  
• Memory organization  
)
– 32Mb: 64 main blocks, 64KB each, or eight 8KB  
boot blocks (top or bottom) and 63 main blocks,  
64KB each  
– 64Mb: 128 main blocks, 64KB each, or eight 8KB  
boot blocks (top or bottom) and 127 main blocks,  
64 KB each  
– 128Mb: 128 main blocks, 128KB each  
• Program/erase controller  
– Embedded byte/word program algorithms  
• Program/erase suspend and resume capability  
– READ operation on any block during a PRO-  
GRAM SUSPEND operation  
– Halogen-free  
– READ or PROGRAM operation on one block dur-  
ing an ERASE SUSPEND operation on another  
block  
• Operating temperature  
– Ambient: –40°C to +85°C  
• BLANK CHECK operation to verify an erased block  
• Unlock bypass, block erase, chip erase, and write to  
buffer capability  
– Fast buffered/batch programming  
– Fast block and chip erase  
PDF: 09005aef84dc44a7  
m29ew_32Mb-128Mb.pdf - Rev. B 11/12 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
1
© 2012 Micron Technology, Inc. All rights reserved.  
Products and specifications discussed herein are subject to change by Micron without notice.  
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