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JM4050ABEA PDF预览

JM4050ABEA

更新时间: 2024-11-02 00:00:19
品牌 Logo 应用领域
其他 - ETC 驱动器
页数 文件大小 规格书
6页 20K
描述
Buffer/Driver

JM4050ABEA 数据手册

 浏览型号JM4050ABEA的Datasheet PDF文件第2页浏览型号JM4050ABEA的Datasheet PDF文件第3页浏览型号JM4050ABEA的Datasheet PDF文件第4页浏览型号JM4050ABEA的Datasheet PDF文件第5页浏览型号JM4050ABEA的Datasheet PDF文件第6页 
MICROCIRCUIT DATA SHEET  
Original Creation Date: 07/27/99  
Last Update Date: 10/18/99  
MJCD4050A-X REV 1A0  
Last Major Revision Date: 09/21/99  
NON-INVERTING HEX BUFFER  
General Description  
This hex buffer is a monolithic complementary MOS (CMOS) integrated circuit constructed  
with N- and P- channel enhancement mode transistors. This device features logic level  
conversion using only one supply voltage (VDD). The input signal high level (VIH) can  
exceed the VDD supply voltage when the device is used for logic conversion. The device is  
intended for use as a hex buffer, CMOS to DTL/TTL converter or as a CMOS current driver,  
and at VDD = 5.0V, it can drive two DTL/TTL loads over the full operating temperature  
range.  
Industry Part Number  
NS Part Numbers  
CD4050A  
JM4050ABEA  
JM4050ABFA  
Prime Die  
CD4050A  
Controlling Document  
38510/05504, amend. #3  
Processing  
Subgrp Description  
Temp (oC)  
MIL-STD-883, Method 5004  
1
Static tests at  
+25  
2
Static tests at  
+125  
-55  
3
Static tests at  
4
Dynamic tests at  
Dynamic tests at  
Dynamic tests at  
Functional tests at  
Functional tests at  
Functional tests at  
Switching tests at  
Switching tests at  
Switching tests at  
+25  
Quality Conformance Inspection  
5
+125  
-55  
6
MIL-STD-883, Method 5005  
7
+25  
8A  
8B  
9
+125  
-55  
+25  
10  
11  
+125  
-55  
1

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