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ISP2312 PDF预览

ISP2312

更新时间: 2024-10-27 23:59:51
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其他 - ETC 控制器
页数 文件大小 规格书
4页 118K
描述
Controller Miscellaneous - Datasheet Reference

ISP2312 数据手册

 浏览型号ISP2312的Datasheet PDF文件第2页浏览型号ISP2312的Datasheet PDF文件第3页浏览型号ISP2312的Datasheet PDF文件第4页 
S i m p l i f y  
ISP2312 Data Sheet  
Dual 2-Gb Fibre Channel to 133-MHz PCI-X Controller  
The ISP2312 is a highly integrated single-chip,  
dual-channel, bus master, Fibre Channel processor  
that targets storage, clustering, and networking  
applications. This chip connects a conventional PCI  
bus or PCI-X bus to a 2-Gb Fibre Channel loop or to  
a point-to-point Fibre Channel port.  
Compliance with PCI Bus Power Management  
Interface Specification Revision 1.1 (PC99)  
Compliance with ANSI SCSI standards for  
class 1, class 2, class 3, and intermix Fibre  
Channel service:  
Second Generation FC Generic Services  
Definition (FC-GS-2), NCITS 288.200x,  
Project 1134-D, revision 5.3  
The ISP2312 is a fully autonomous device,  
capable of managing multiple I/O operations and  
associated data transfers from start to finish without  
host intervention.  
Third Generation FC Generic Services  
Definition (FC-GS-3) draft, revision 6.2  
The ISP2312 balances the advanced bus speeds  
and efficiency of PCI-X with exceptional 2-Gb Fibre  
Channel performance. Fibre Channel support for  
SCSI, IP, and VI allows the ISP2312 to target a wide  
spectrum of storage and system area networks  
(SANs).  
Fibre Channel-Physical and Signaling  
Interface (FC-PH), X2.230:1994  
SCSI-3 Fibre Channel Protocol  
(SCSI-FCP), X3.269:1996  
Fibre Channel-Arbitrated Loop-2  
(FC-AL-2), Project 1133-D, revision 6.5  
Fibre Channel-Private Loop Direct Attach  
Technical Report (FC-PLDA),  
NCITS/TR-19:1998  
Features  
66/133-MHz, 64-bit, true multifunction PCI-X  
host bus interface  
SCSI-3 Architecture Model (SAM),  
Backward compatible to standard 33/66-MHz  
X3T10/994D/Rev 18  
PCI  
SCSI-3 Controller Command Set,  
5-V tolerant PCI interface  
X3T10/Project 1047D/Rev 6c  
Compliance with PCI Local Bus Specification  
revision 2.2 and PCI-X Specification revision  
1.0a  
Two concurrently operating 2 Gbps capable  
Fibre Channel nodes  
Supports up to 400 MBps sustained Fibre  
Supports Fibre Channel-arbitrated loop  
(FC-AL),FC-AL-2,point-to-point,andswitched  
fabric topologies  
Channel data transfer rate  
Supports SCSI initiator, initiator/target, and  
target modes  
Supports full-duplex communications in all  
Onboard, enhanced RISC processor  
Onboard 2-Gb serial transceivers  
Fibre Channel topologies  
Supports Fibre Channel protocol-SCSI  
(FCP-SCSI), Fibre Channel Internet protocol  
(IP), and Fibre Channel-virtual interface  
(FC-VI) protocol  
Automatically negotiates the Fibre Channel bit  
rate (1 or 2 Gb)  
Supports PCI dual-address cycle and cache  
commands  
83312-580-00 B  
page 1 of 4  

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