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ISP1161ABD,157 PDF预览

ISP1161ABD,157

更新时间: 2024-11-09 19:48:47
品牌 Logo 应用领域
恩智浦 - NXP 时钟外围集成电路
页数 文件大小 规格书
134页 587K
描述
IC UNIVERSAL SERIAL BUS CONTROLLER, PQFP64, 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64, Bus Controller

ISP1161ABD,157 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:QFP包装说明:10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
针数:64Reach Compliance Code:unknown
风险等级:5.22其他特性:OPERATES AT 5V SUPPLY WITH REGULATOR
地址总线宽度:2总线兼容性:SH-3; SH-4; ARM7; ARM9; STRONGARM; MIPS
最大时钟频率:6 MHz外部数据总线宽度:16
JESD-30 代码:S-PQFP-G64长度:10 mm
湿度敏感等级:1端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP64,.47SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:3.3/5 V认证状态:Not Qualified
座面最大高度:1.6 mm子类别:Bus Controllers
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:10 mmuPs/uCs/外围集成电路类型:BUS CONTROLLER, UNIVERSAL SERIAL BUS
Base Number Matches:1

ISP1161ABD,157 数据手册

 浏览型号ISP1161ABD,157的Datasheet PDF文件第2页浏览型号ISP1161ABD,157的Datasheet PDF文件第3页浏览型号ISP1161ABD,157的Datasheet PDF文件第4页浏览型号ISP1161ABD,157的Datasheet PDF文件第5页浏览型号ISP1161ABD,157的Datasheet PDF文件第6页浏览型号ISP1161ABD,157的Datasheet PDF文件第7页 
ISP1161A  
Full-speed Universal Serial Bus single-chip host and device  
controller  
Rev. 03 — 23 December 2004  
Product data  
1. General description  
The ISP1161A is a single-chip Universal Serial Bus (USB) Host Controller (HC) and  
Device Controller (DC). The Host Controller portion of the ISP1161A complies with  
Universal Serial Bus Specification Rev. 2.0, supporting data rates at full-speed  
(12 Mbit/s) and low-speed (1.5 Mbit/s). The Device Controller portion of the  
ISP1161A also complies with Universal Serial Bus Specification Rev. 2.0, supporting  
data rates at full-speed (12 Mbit/s). These two USB controllers, the HC and the DC,  
share the same microprocessor bus interface. They have the same data bus, but  
different I/O locations. They also have separate interrupt request output pins,  
separate DMA channels that include separate DMA request output pins and DMA  
acknowledge input pins. This makes it possible for a microprocessor to control both  
the USB HC and the USB DC at the same time.  
ISP1161A provides two downstream ports for the USB HC and one upstream port for  
the USB DC. Each downstream port has an overcurrent (OC) detection input pin and  
power supply switching control output pin. The upstream port has a VBUS detection  
input pin. ISP1161A also provides separate wake-up input pins and suspended status  
output pins for the USB HC and the USB DC, respectively. This makes power  
management flexible. The downstream ports for the HC can be connected with any  
USB compliant devices and hubs that have USB upstream ports. The upstream port  
for the DC can be connected to any USB compliant USB host and USB hubs that  
have USB downstream ports.  
The HC is adapted from the Open Host Controller Interface Specification for USB  
Release 1.0a, referred to as OHCI in the rest of this document.  
The DC is compliant with most USB device class specifications such as Imaging  
Class, Mass Storage Devices, Communication Devices, Printing Devices and Human  
Interface Devices.  
ISP1161A is well suited for embedded systems and portable devices that require a  
USB host only, a USB device only, or a combination of a configurable USB host and  
USB device. ISP1161A brings high flexibility to the systems that have it built-in. For  
example, a system that uses an ISP1161A allows it not only to be connected to a PC  
or USB hub with a USB downstream port, but also to be connected to a device that  
has a USB upstream port such as a USB printer, USB camera, USB keyboard or a  
USB mouse. Therefore, the ISP1161A enables peer-to-peer connectivity between  
embedded systems. An interesting application example is to connect an ISP1161A  
HC with an ISP1161A DC.  
Consider an example of an ISP1161A being used in a Digital Still Camera (DSC)  
design. Figure 1 shows an ISP1161A being used as a USB DC. Figure 2 shows an  
ISP1161A being used as a USB HC. Figure 3 shows an ISP1161A being used as a  
USB HC and a USB DC at the same time.  

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