Datasheet > ISLA224S25IR48EV1Z

ISLA224S25IR48EV1Z

更新时间： 2024-11-21 11:58:31

品牌	Logo	应用领域
英特矽尔 - INTERSIL		/
页数	文件大小	规格书
40页	1287K
描述
Dual 12-Bit, 250/200/125 MSPS JESD204B High Speed Serial Output ADC

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Dual 12-Bit, 250/200/125 MSPS JESD204B High Speed

Serial Output ADC

ISLA222S

Features

The ISLA222S is a series of low-power, high-performance,

dual-channel 12-bit, analog-to-digital converters. Designed

with FemtoCharge™ technology on a standard CMOS process,

the series supports sampling rates of up to 250MSPS. The

ISLA222S is part of a pin-compatible family of 12- and 14-bit

dual-channel A/Ds with maximum sample rates ranging from

125MSPS to 250MSPS and shares the same analog core as

Intersil's proven ISLA222P series of ADCs. The family

minimizes power consumption while providing state-of-the art

dynamic performance, offering an optimal performance-vs-

power trade-off.

• JESD204A/B High Speed Data Interface

- JESD204A Compliant

- JESD204B Device Subclass 0 Compliant

- JESD204B Device Subclass 2 Compatible

- Up to 3 JESD204 Output Lanes Running up to 4.375Gbps

- Highly Configurable JESD204 Transmitter

• Multiple Chip Time Alignment and Deterministic Latency

Support (JESD204B Device Subclass 2)

• SPI Programmable Debugging Features and Test Patterns

• 48-pin QFN 7mmx7mm Package

Differentiating the ISLA222S from the ISLA222P is its highly

configurable, JESD204B-compliant, high speed serial output

link. The link offers data rates up to 4.375Gbps per lane and

multiple packing modes. It can be configured to use one, two,

or three lanes to transmit the conversion data, allowing for

flexibility in the receiver design. The SERDES transmitter also

provides deterministic latency and multi-chip time alignment

support to satisfy an application's complex synchronization

requirements.

Key Specifications

• SNR @ 250/200/125MSPS

70.6/71.2/71.7 dBFS f = 30MHz

70.3/70.7/70.9 dBFS f = 190MHz

• SFDR @ 250/200/125MSPS

87/93/95 dBc f = 30MHz

A serial peripheral interface (SPI) port allows for extensive

configurability of the JESD204B transmitter including access

to its built-in link and transport-layer test patterns. The SPI port

also provides control for numerous additional features

including the fine gain and offset adjustments of the two ADC

cores as well as the programmable clock divider, enabling 2x

and 4x harmonic clocking.

84/93/86 dBc f = 190MHz

• Total Power Consumption: 989mW @ 250MSPS

Applications

• Radar and Satellite Antenna Array Processing

• Broadband Communications and Microwave Receivers

• High-Performance Data Acquisition

• Communications Test Equipment

• High-Speed Medical Imaging

The ISLA222S is available in a space-saving 7mmx7mm 48 Ld

QFN package. The package features a thermal pad for

improved thermal performance and is specified over the full

industrial temperature range (-40°C to +85°C).

Pin-Compatible Family

SPEED

PRODUCT

MODEL

ISLA224S25

ISLA224S20

ISLA224S12

ISLA222S25

ISLA222S20

ISLA222S12

RESOLUTION

(MSPS)

AVAILABILITY

250

200

125

250

200

125

Now

FIGURE 1. SERDES DATA EYE AT 4.375Gbps

May 1, 2012

FN8302.0

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.

All other trademarks mentioned are the property of their respective owners.

12 3 4 5 6 7...40

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