DATASHEET
ISLA212P
12-Bit, 250MSPS/200MSPS/130MSPS ADC
FN7717
Rev 2.00
November 30, 2012
The ISLA212P is a series of low power, high performance
12-bit analog-to-digital converters. Designed with Intersil’s
proprietary FemtoCharge™ technology on a standard CMOS
process, the series supports sampling rates of up to 250MSPS.
The ISLA212P is part of a pin-compatible family of 12 to 16-bit
A/Ds with maximum sample rates ranging from 130MSPS to
500MSPS.
Features
• Single Supply 1.8V Operation
• Clock Duty Cycle Stabilizer
• 75fs Clock Jitter
• 700MHz Bandwidth
• Programmable Built-in Test Patterns
• Multi-ADC Support
A serial peripheral interface (SPI) port allows for extensive
configurability, as well as fine control of various parameters
such as gain and offset. Digital output data is presented in
selectable LVDS or CMOS formats, and can be configured as
full-width, single data rate (SDR) or half-width, double data
rate (DDR). The ISLA212P is available in a 72-contact QFN
package with an exposed paddle. Operating from a 1.8V
supply, performance is specified over the full industrial
temperature range (-40°C to +85°C).
- SPI Programmable Fine Gain and Offset Control
- Support for Multiple ADC Synchronization
- Optimized Output Timing
• Nap and Sleep Modes
- 200µs Sleep Wake-up Time
• Data Output Clock
• SDR/DDR LVDS-Compatible or LVCMOS Outputs
• Selectable Clock Divider
Key Specifications
• SNR @ 250/200/130MSPS
70.5/71.0/71.5dBFS f = 30MHz
IN
68.7/68.9/68.8dBFS f = 363MHz
IN
Applications
• Radar Array Processing
• SFDR @ 250/200/130MSPS
• Software Defined Radios
83/83/88dBc f = 30MHz
IN
78/81/85dBc f = 363MHz
IN
• Total Power Consumption = 440mW @ 250MSPS
• Broadband Communications
• High-Performance Data Acquisition
• Communications Test Equipment
Pin-Compatible Family
SPEED
(MSPS)
MODEL
RESOLUTION
ISLA216P25
ISLA216P20
ISLA216P13
ISLA214P50
ISLA214P25
ISLA214P20
ISLA214P13
ISLA212P50
ISLA212P25
ISLA212P20
ISLA212P13
16
16
16
14
14
14
14
12
12
12
12
250
200
130
500
250
200
130
500
250
200
130
CLKP
CLKOUTP
CLKOUTN
CLOCK
MANAGEMENT
CLKN
VINP
VINN
12-BIT
250 MSPS
ADC
D[11:0]P
D[11:0]N
SHA
DIGITAL
ERROR
CORRECTION
+
–
VCM
SPI
CONTROL
FN7717 Rev 2.00
November 30, 2012
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