ISL8700, ISL8701, ISL8702, ISL8702A,
ISL8703, ISL8704, ISL8705
®
Data Sheet
March 14, 2006
FN9250.0
Adjustable Quad Sequencer
Features
The ISL8700, ISL8701, ISL8702, ISL8702A, ISL8703,
ISL8704, ISL8705 family of ICs provide four delay adjustable
sequenced outputs while monitoring an input voltage all with
a minimum of external components.
• Adjustable Delay to Subsequent Enable Signal
• Adjustable Delay to Sequence Auto Start
• Adjustable Distributed Voltage Monitoring
High performance DSP, FPGA, µP and various subsystems
require input power sequencing for proper functionality at
initial power up and the ISL870X provides this function while
monitoring the distributed voltage for over and undervoltage
compliance.
• Under and Overvoltage Adjustable Delay to Auto Start
Sequence
• I/O Options
ENABLE (ISL8700, ISL8702, ISL8702A, ISL8704) and
ENABLE# (ISL8701, ISL8703, ISL8705)
SEQ_EN (ISL8702, ISL8702A, ISL8703) and SEQ_EN#
(ISL8704, ISL8705)
The ISL8700 and ISL8701 operate over the +2.5V to +24V
nominal voltage range, whereas the ISL8702 operates over
the 2.5V to +12V range. All three have a user adjustable
time from UV and OV voltage compliance to sequencing
start via an external capacitor when in auto start mode and
adjustable time delay to subsequent ENABLE output signal
via external resistors.
• Voltage Compliance Fault Output
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Power Supply Sequencing
Additionally, ISL8702A, ISL8703, ISL8704 and ISL8705
provide I/O for sequencing on and off operation (SEQ_EN)
and for voltage window compliance reporting (FAULT) over
the +2.5V to +24V voltage range. The ISL8702 also has this
feature but operates over the 2.5V to +12V range.
• System Timing Function
Pinout
ISL870X
(14 LD SOIC)
TOP VIEW
Easily daisy chained for more than 4 sequenced signals.
Altogether, the ISL870X provides these adjustable features
with a minimum of external BOM. See Figure 1 for typical
implementation.
14
13
ENABLE_D
ENABLE_C
ENABLE_B
1
2
3
4
5
6
7
VIN
TD
12 TC
ENABLE_A
OV
TB
11
Ordering Information
TIME
10
9
PARTNUMBER
(Notes 1, 2)
PART
TEMP.
PACKAGE
(Pb-free)
PKG.
UV
SEQ_EN (NC on ISL8700/01)
FAULT (NC on ISL8700/01)
MARKING RANGE (°C)
DWG. #
GND
8
ISL8700IBZ*
ISL8701IBZ*
ISL8702IBZ*
ISL8702AIBZ-T
ISL8700IBZ
ISL8701IBZ
ISL8702IBZ
-40 to +85 14 Ld SOIC
-40 to +85 14 Ld SOIC
-40 to +85 14 Ld SOIC
-40 to +85 14 Ld SOIC
M14.15
M14.15
M14.15
M14.15
ISL8701, ISL8703, ISL8705 PINS 1-4 ARE ENABLE# FUNCTION
ISL8704, ISL8705 PIN 9 IS SEQ_EN# FUNCTION
(Tape and Reel)
2.5-24V (12Vmax for ISL8702)
ISL8703IBZ*
ISL8704IBZ*
ISL8705IBZ*
ISL8703IBZ
ISL8704IBZ
ISL8705IBZ
-40 to +85 14 Ld SOIC
-40 to +85 14 Ld SOIC
-40 to +85 14 Ld SOIC
M14.15
M14.15
M14.15
EN
DC/DC
Vo1
Vo2
Vo3
V04
VIN
SEQ_EN *
Ru
ENABLE_A
ENABLE_B
ENABLE_C
ENABLE_D
EN
DC/DC
ISL870XEVAL1 Evaluation Platform
UV
*Add “-T” suffix for tape and reel.
NOTES:
Rm
Rl
FAULT *
OV
EN
EN
DC/DC
GND TB TC TD TIME
1. Part Numbers in Bold are available now, others will soon be available,
contact factory for availability schedule.
2. Intersil Pb-free plus anneal products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
DC/DC
* SEQ_EN and FAULT are not available on ISL8700 and ISL8701
FIGURE 1. ISL870X IMPLEMENTATION
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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1
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