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ISL6550BIB-T PDF预览

ISL6550BIB-T

更新时间: 2024-11-28 23:59:51
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其他 - ETC 模拟IC光电二极管
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11页 521K
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Analog IC

ISL6550BIB-T 数据手册

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ISL6550A, ISL6550B, ISL6550C  
TM  
Data Sheet  
November 2001  
File Number 9036.1  
SAM (Supervisor And Monitor)  
Features  
The ISL6550 is a precision, flexible, VID-code-controlled  
reference and voltage monitor for high-end microprocessor  
and memory power supplies. It monitors various input  
signals, and supervises the system (typically a DC/DC  
converter) with its output signals. See the Block Diagram for  
reference.  
• 12V supply operation  
• 5V reference output  
• 5-bit digital-to-analog converter  
• Programmable DAC Range, within 0.8–5.0V  
• Programmable undervoltage and overvoltage thresholds,  
and latched fault detection  
The ISL6550 includes a 5-bit DAC (Digital-to-Analog  
Converter), which is programmed by the five VID inputs. The  
voltage range of the BDAC (Buffered DAC output) is  
determined by the DACHI and DACLO voltage levels, which  
are externally adjustable through the R1, R2, R3 resistor  
divider network.VREF5 is a precision-trimmed 5V reference,  
and is used to set the voltage at the top of the resistor  
divider.  
• Optional delayed undervoltage (programmable with  
external capacitor)  
• Undervoltage lockout (power-on-reset)  
• Status Indicators (START, PGOOD)  
• Uncommitted operational amplifier  
• Compatible with ISL6551 full bridge controller  
• 20 pin SOIC and 20 lead MLFP (5x5) packages  
Programmable window comparators monitor Over-Voltage  
(OV) and Under-Voltage (UV) levels. The OVUVSEN input,  
usually coming from the associated power converter device  
is monitored and compared with BDAC; an error band is  
established via the R4 and R5 resistor setting on the  
OVUVTH pin. An optional external capacitor on the UVDLY  
pin gives a programmable delay on the UV. A high gain  
operational amplifier is available at pins VOPP, VOPM, and  
VOPOUT; it can be used as a gain stage to permit  
Applications  
• Power Supplies for High End Microprocessors and Servers  
• Can be paired with the ISL6551 FBC for a complete full-  
bridge 48V-input converter, or used independently  
monitoring voltages that are different from the BDAC levels.  
Ordering Information  
The PEN (Power supply ENable) input, driven from an open-  
collector source, enables (when logic high) the external  
converter output, via the PGOOD or START outputs (both  
open-drain). They both basically indicate that the power  
supply is enabled (PEN = high) and there are no fault  
conditions. There are three logic options available, which  
determine the START and PGOOD states; see the block  
diagram or the Logic Options Table for more detail.The three  
logic options are identified with a suffix letter A, B, or C in the  
ordering information.  
PART  
NUMBER  
TEMP. RANGE  
o
( C)  
PACKAGE  
PKG. NO.  
ISL6550AIB  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
20 Lead SOIC M20.3  
20 Lead SOIC M20.3  
20 Lead SOIC M20.3  
20 Lead MLFP L20.5x5  
20 Lead MLFP L20.5x5  
20 Lead MLFP L20.5x5  
ISL6550BIB  
ISL6550CIB  
ISL6550AIR  
ISL6550BIR  
ISL6550CIR  
NOTE: The same part numbers with a “-T” suffix are available as  
Tape and Reel.  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.  
Copyright © Intersil Americas Inc. 2001, All Rights Reserved  
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