ISL3856
®
Data Sheet
April 2002
FN4932.2
PRELIMINARY
Wireless LAN Access Point Controller
Features
The Intersil ISL3856 Wireless LAN
Access Point Controller is part of
Intersil’s Wireless LAN chip sets
targeting Access Point applications.
• ARM940T Core
• Baseband Processor Interface Providing a Direct Transmit
and Receive Serial Interface to an External Baseband
Processor
The ISL3856 Access Point Controller is an ARM940 core
controller with an onboard MAC to Ethernet (10/100 Base T)
interface. The ISL3856 directly interfaces with the Intersil
HFA386x family of Baseband Processors, offering a
complete end-to-end IEEE 802.11b compliant chip set
solution for wireless LAN products. Protocol and PHY
support are implemented in firmware to allow custom
protocol and different PHY transceivers.
• Serial Control Port (SCP), Supporting Serial
Communication for Control of External Devices
• Memory Interfaces Supporting SRAM, ROM and SDRAM
Memories, at 8, 16 or 32 bits
• Real Time Clock
• MII Interface
• 3 General Purpose Timers
• Interrupt Controller
The ISL3856 is a Harvard architecture cached processor.
The separate instruction and data caches in this design are
4kbytes each in size with a four-word line length. A
protection unit allows the memory to be segmented and
protected in a simple manner. There is no virtual physical
address mapping. Write-back cache schemes and write
buffers are used to optimize performance and minimize bus
traffic thus reducing system power consumption. This
Processor Core is implemented using a five-stage pipeline
consisting of fetch, decode, execute, memory and write
stages.
• 16 General Purpose I/Os (GPIO)
• A UART to Enable System Debugging, Multiplexed onto
GPIO Lines
• On-Chip PLL for Clock Generation
• Test Interface Controller (TIC) to Support Manufacturing
Tests
• JTAG Interface for Boundary Scan and Debug Port
• Power Management Capabilities
Firmware implements the full IEEE 802.11b Wireless LAN
MAC protocol. It supports Infrastructure mode BSS
operation under DCF, and operation under the optional Point
Coordination Function (PCF). All low-level 802.11 functions
are handled by firmware. Additional firmware functions
specific to access point applications are also available.
• IEEE802.11 Standard Data Rates: 1, 2, 5.5 and 11Mbps
• Part of the Intersil PRISM Wireless LAN Chip Set
• Full Implementation of the MAC Protocol Specified in
IEEE Standards 802.11-1999 and 802.11b
• Operation at 3.3V Supply
The ISL3856 is the industry’s first Access Point on a chip,
which implements both the IEEE 802.11 MAC protocol and
the MAC bridging function, which in alternative solutions
requires a separate external processor. For network
management, an SNMP agent is implemented for access to
the MIB.
• 169 Pin BGA Package Targeted for Compact Gateways
Applications
• High Data Rate Wireless LAN up to 54Mbits
• Residential Gateways
Designing wireless protocol systems using the ISL3856 is
made easier with Intersil supplied firmware, software device
drivers, and complete documentation.
• Wireless LAN Modules such as Wireless Gateways
• Wireless LAN Access Points
• Wireless Bridge Products
Ordering Information
• Wireless Point-to-Multipoint Systems
PART
TEMP. RANGE
o
NUMBER
( C)
PACKAGE
PKG. NO.
ISL3856CK
0 to 70
0 to 70
BGA 11x11
V169.11x11
ISL3856CK-T
Tape and Reel 1000 Per Reel
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
PRISM® is a registered trademark of Intersil Americas Inc. PRISM and design is a trademark of Intersil Americas Inc.