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ISL12026IBZ-T13 PDF预览

ISL12026IBZ-T13

更新时间： 2024-02-20 15:31:07
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管外围集成电路
页数 文件大小 规格书
24页 555K
描述
Real Time Clock

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ISL12026IBZ-T13 技术参数

是否Rohs认证： 符合生命周期：Transferred
包装说明：SOP,Reach Compliance Code：compliant
风险等级：5.68外部数据总线宽度：
信息访问方法：I2CJESD-30 代码：R-PDSO-G8
JESD-609代码：e3长度：4.9 mm
湿度敏感等级：1端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
座面最大高度：1.75 mm最大供电电压：5.5 V
最小供电电压：2.7 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn) - annealed
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL宽度：3.9 mm
uPs/uCs/外围集成电路类型：TIMER, REAL TIME CLOCKBase Number Matches：1

ISL12026IBZ-T13 数据手册

 浏览型号ISL12026IBZ-T13的Datasheet PDF文件第1页浏览型号ISL12026IBZ-T13的Datasheet PDF文件第3页浏览型号ISL12026IBZ-T13的Datasheet PDF文件第4页浏览型号ISL12026IBZ-T13的Datasheet PDF文件第5页浏览型号ISL12026IBZ-T13的Datasheet PDF文件第6页浏览型号ISL12026IBZ-T13的Datasheet PDF文件第7页 
ISL12026, ISL12026A  
Ordering Information  
PART NUMBER  
(Notes 1, 2, 3)  
PART  
MARKING  
V
TRIP POINT BSW BIT DEFAULT TEMP RANGE  
PACKAGE  
(Pb-Free)  
PKG.  
DWG. #  
BAT  
(V)  
< V  
< V  
2.2  
2.2  
SETTING  
BSW = 1  
BSW = 1  
BSW = 0  
BSW = 0  
(°C)  
ISL12026IBZ  
ISL12026IVZ  
ISL12026AIBZ  
ISL12026AIVZ  
NOTES:  
12026 IBZ  
2026 IVZ  
V
V
-40 to +85  
-40 to +85  
-40 to +85  
-40 to +85  
8 Ld SOIC  
M8.15  
DD  
BAT  
BAT  
8 Ld TSSOP  
8 Ld SOIC  
M8.173  
M8.15  
DD  
12026A IBZ  
2026A IVZ  
8 Ld TSSOP  
M8.173  
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.  
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte  
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-  
free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.  
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL12026, ISL12026A. For more information on MSL please see  
techbrief TB363.  
Block Diagram  
OSC  
COMPENSATION  
X1  
X2  
TIMER  
CALENDAR  
LOGIC  
BATTERY  
SWITCH  
CIRCUITRY  
TIME  
KEEPING  
REGISTERS  
(SRAM)  
V
V
FREQUENCY  
DIVIDER  
DD  
1Hz  
OSCILLATOR  
32.768kHz  
BAT  
IRQ/F  
OUT  
SELECT  
STATUS  
CONTROL/  
REGISTERS  
(EEPROM)  
CONTROL  
DECODE  
LOGIC  
COMPARE  
SERIAL  
INTERFACE  
DECODER  
REGISTERS  
SCL  
SDA  
ALARM  
(SRAM)  
ALARM REGS  
(EEPROM)  
8
4k  
EEPROM  
ARRAY  
Pin Descriptions  
PIN NUMBER  
SOIC  
TSSOP  
SYMBOL  
DESCRIPTION  
1
3
X1  
The X1 pin is the input of an inverting amplifier and is intended to be connected to one pin of an external  
32.768kHz quartz crystal. X1 can also be driven directly from a 32.768kHz source (see “Application Section”  
on page 19.)  
2
3
4
5
X2  
The X2 pin is the output of an inverting amplifier and is intended to be connected to one pin of an external  
32.768kHz quartz crystal (see “Application Section” on page 19.)  
IRQ/F  
Interrupt Output/Frequency Output is a multi-functional pin that can be used as interrupt or frequency  
output pin. The function is set via the control register. This output is an open drain configuration.  
OUT  
4
5
6
7
GND  
Ground.  
SDA  
Serial Data (SDA) is a bidirectional pin used to transfer serial data into and out of the device. It has an open  
drain output and may be wire OR’ed with other open drain or open collector outputs.  
6
7
8
8
1
2
SCL  
The Serial Clock (SCL) input is used to clock all serial data into and out of the device. The input buffer on  
this pin is always active (not gated).  
V
This input provides a backup supply voltage to the device. V  
supplies power to the device in the event  
BAT  
BAT  
that the V  
supply fails. This pin should be tied to ground if not used.  
DD  
V
Power Supply.  
DD  
FN8231.9  
November 30, 2010  
2
1234567...24

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