5秒后页面跳转
ISI-L67201V-65 PDF预览

ISI-L67201V-65

更新时间: 2024-12-01 04:36:39
品牌 Logo 应用领域
TEMIC 先进先出芯片
页数 文件大小 规格书
16页 146K
描述
FIFO, 512X9, 65ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32

ISI-L67201V-65 数据手册

 浏览型号ISI-L67201V-65的Datasheet PDF文件第2页浏览型号ISI-L67201V-65的Datasheet PDF文件第3页浏览型号ISI-L67201V-65的Datasheet PDF文件第4页浏览型号ISI-L67201V-65的Datasheet PDF文件第5页浏览型号ISI-L67201V-65的Datasheet PDF文件第6页浏览型号ISI-L67201V-65的Datasheet PDF文件第7页 
MATRA MHS  
L 67201/L 67202  
512 × 9 & 1K × 9 / 3.3 Volts CMOS Parallel FIFO  
Introduction  
The L67201/202 implement a first-in first-out algorithm, Using an array of eight transistors (8 T) memory cell and  
featuring asynchronous read/write operations. The FULL fabricated with the state of the art 1.0 µm lithography  
and EMPTY flags prevent data overflow and underflow. named SCMOS, the L 67201/202 combine an extremely  
The Expansion logic allows unlimited expansion in word low standby supply current (typ = 1.0 µA) with a fast  
size and depth with no timing penalties. Twin address access time at 55 ns over the full temperature range. All  
pointers automatically generate internal read and write versions offer battery backup data retention capability  
addresses, and no external address information are with a typical power consumption at less than 5 µW.  
required for the MHS FIFOs. Address pointers are  
For military/space applications that demand superior  
automatically incremented with the write pin and read  
levels of performance and reliability the L 67201/202 is  
pin. The 9 bits wide data are used in data communications  
processed according to the methods of the latest revision  
applications where a parity bit for error checking is  
of the MIL STD 883 (class B or S) and/or ESA SCC 9000.  
necessary. The Retransmit pin reset the Read pointer to  
zero without affecting the write pointer. This is very  
useful for retransmitting data when an error is detected in  
the system.  
Features  
D First-in first-out dual port memory  
D Single supply 3.3 ± 0.3 volts  
D 512 × 9 organisation (L 67201)  
D 1024 × 9 organisation (L 67202)  
D Fast access time  
D Fully expandable by word width or depth  
D Asynchronous read/write operations  
D Empty, full and half flags in single device mode  
D Retransmit capability  
D Bi-directional applications  
55, 60, 65 ns, commercial, industrial military and  
automotive  
D Battery back-up operation 2 V data retention  
D TTL compatible  
D Wide temperature range :  
D High performance SCMOS technology  
– 55 °C to + 125 °C  
D 67201L/202L low power  
67201V/202V very low power  
Rev. C (10/11/95)  
1

与ISI-L67201V-65相关器件

型号 品牌 获取价格 描述 数据表
ISI-L67202L-55 TEMIC

获取价格

FIFO, 1KX9, 55ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32
ISI-L67202L-60 TEMIC

获取价格

FIFO, 1KX9, 60ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32
ISI-L67202L-65 TEMIC

获取价格

FIFO, 1KX9, 65ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32
ISI-L67202V-55 TEMIC

获取价格

FIFO, 1KX9, 55ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32
ISJ0505A XPPOWER

获取价格

1 Watt ISJ Series
ISJ0512A XPPOWER

获取价格

1 Watt ISJ Series
ISJ0515A XPPOWER

获取价格

1 Watt ISJ Series
ISJ-100B NUVOTEM TALEMA

获取价格

ISDN - SO Miniature Interface Transformer
ISJ1205A XPPOWER

获取价格

1 Watt ISJ Series
ISJ-140B NUVOTEM TALEMA

获取价格

ISDN - SO Miniature Interface Transformer